IP Library Granted Patent US 12,046,532
Granted Patent B2
US 12,046,532 · App. 17/746,760 · Granted Jul 23, 2024

Power module and fabrication method of the same, graphite plate, and power supply equipment

Inventors: Maiko Hatano (Kyoto, JP); Takukazu Otsuka (Kyoto, JP); Hirotaka Otake (Kyoto, JP); Tatsuya Miyazaki (Kyoto, JP)
Assignee: ROHM CO., LTD.
H01L23/3735H01L23/3675H01L23/373H01L23/4952H01L23/49541H01L23/49838H01L23/49861H01L24/48H01L25/115H01L25/18H01L25/50H01L23/49811H01L23/49877H01L24/32H01L24/33H01L24/40H01L24/73H01L29/1608H01L29/7395H01L29/7397H01L29/7802H01L29/7804H01L29/7805H01L29/7813H01L2224/0603H01L2224/29139H01L2224/32245H01L2224/33181H01L2224/40225H01L2224/40245H01L2224/45124H01L2224/45147H01L2224/48091H01L2224/48106H01L2224/48247H01L2224/73221H01L2224/73263H01L2224/73265H01L2924/10272H01L2924/1203H01L2924/13055H01L2924/13091H01L2924/19107
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Quick Facts
Patent No.
US 12,046,532
App. No.
17/746,760
Granted
Jul 23, 2024
Kind
B2
Abstract

A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.

Claims (35)

1. A power module comprising:

an insulating substrate having a first surface and a second surface opposite to the first surface;

a plurality of first electrode patterns disposed on the second surface;

a plurality of semiconductor devices arranged side-by-side on a surface of one of the plurality of first electrode patterns, the semiconductor devices generating heat during operation;

a substrate disposed on the plurality of semiconductor devices and provided with an anisotropic thermal conductivity in a planar direction or/and a thickness direction thereof; and

a second electrode pattern disposed between the substrate and the plurality of semiconductor devices and electrically connected to surface electrodes of the plurality of semiconductor devices,

wherein an arrangement direction of the plurality of the semiconductor devices is within a range from −45 degree to +45 degrees, on the basis of an orientation direction in which a thermal conductivity of the substrate is relatively low.

2. The power module according to claim 1 , wherein the arrangement direction of the plurality of the semiconductor devices is substantially orthogonal to an orientation direction in which a thermal conductivity of the substrate is relatively high.

3. The power module according to claim 1 , wherein an interval distance in the arrangement direction of the plurality of the semiconductor devices is shorter than a distance each of from the semiconductor device to an end surface of the substrate parallel to the arrangement direction.

4. The power module according to claim 1 , wherein the substrate is provided with an orientation where a coefficient of thermal conductivity in the thickness direction is relatively higher than the coefficient of thermal conductivity in the plane direction.

5. A power module comprising:

an insulating substrate having a first surface and a second surface opposite to the first surface;

a plurality of first electrode patterns disposed on the second surface;

a plurality of semiconductor devices arranged side-by-side on a surface of one of the plurality of electrode patterns, the semiconductor devices generating heat during operation;

a substrate disposed on the plurality of semiconductor devices and provided with an anisotropic thermal conductivity in a planar direction or/and a thickness direction thereof; and

a second electrode pattern disposed between the substrate and the plurality of semiconductor devices and electrically connected to surface electrodes of the plurality of semiconductor devices,

wherein a distance between the plurality of semiconductor devices is a distance where the heat from each of the plurality of semiconductor devices does not overlap one another on a surface opposite to the semiconductor device side of the substrate when the heat from each of the plurality of semiconductor devices is respectively spread at predetermined angles as the heat is transferred to the opposite surface.

6. The power module according to claim 5 , wherein the substrate is provided with an orientation in which a coefficient of thermal conductivity in the thickness direction is relatively higher than the coefficient of thermal conductivity in the plane direction.

7. The power module according to claim 1 , wherein the semiconductor device comprises one selected from the group consisting of SiC MOSFET and IGBT.

8. The power module according to claim 5 , wherein the semiconductor device comprises one selected from the group consisting of SiC MOSFET and IGBT.

9. The power module according to claim 1 , wherein the plurality of semiconductor devices are substantially linearly arranged along the orientation direction or are substantially linearly arranged along a direction inclined at a predetermined angle with respect to the orientation direction.

10. The power module according to claim 5 , wherein the plurality of semiconductor devices are substantially linearly arranged along an orientation direction where a thermal conductivity of the graphite substrate is relatively low, or are substantially linearly arranged along a direction inclined at a predetermined angle with respect to the orientation direction.

11. The power module according to claim 1 , wherein the plurality of semiconductor devices are arranged in zigzag with respect to the orientation direction.

12. The power module according to claim 5 , wherein the plurality of semiconductor devices are arranged in zigzag with respect to an orientation direction in which a thermal conductivity of the graphite substrate is relatively low.

13. The power module according to claim 1 , wherein the power module includes a configuration of module with the built-in half-bridge in which two pieces of the semiconductor devices are included as one module.

14. The power module according to claim 5 , wherein a distance between the semiconductor devices is equal to or greater than approximately twice as long as a distance from the semiconductor devices to the opposite surface of the substrate.

15. The power module according to claim 1 , wherein the substrate is a graphite substrate.

16. The power module according to claim 5 , wherein the substrate is a graphite substrate.

17. The power module according to claim 2 , wherein the substrate is thicker than the wiring pattern.

18. The power module according to claim 5 , wherein a wiring pattern is formed between the substrate and the plurality of semiconductor devices.

19. The power module according to claim 6 , wherein the substrate is thicker than the wiring pattern.

20. The power module according to claim 1 , wherein the plurality of first electrode patterns disposed on the substrate include a first-first electrode pattern on which the semiconductor devices are disposed, and a second-first electrode pattern different from the first electrode pattern, the second-first electrode pattern being disposed at a position away from a position where the first electrode pattern is disposed.

21. The power module according to claim 5 , wherein the plurality of first electrode patterns disposed on the substrate include a first-first electrode pattern on which the semiconductor devices are disposed, and a second-first electrode pattern different from the first electrode pattern, the second-first electrode pattern disposed at a position away from a position where the first electrode pattern is disposed.

22. The power module according to claim 1 , wherein the second electrode pattern is electrically connected to the electrodes of the plurality of semiconductor devices via a bonding member.

23. The power module according to claim 5 , wherein the second electrode pattern is electrically connected to the electrodes of the plurality of semiconductor devices via a bonding member.

Continuity (2)
Continuation 15813929 · Nov 15, 2017
Related Publication 20220310479A1 · Sep 29, 2022