Three-dimensionally structured imaging device

1. An imaging device, comprising:

a first substrate including a sensor pixel that is configured to perform photoelectric conversion;

a second substrate including a pixel circuit that is configured to output a pixel signal based on electric charges outputted from the sensor pixel; and

a third substrate including a processing circuit that is configured to perform signal processing on the pixel signal,

the first substrate, the second substrate, and the third substrate being stacked in this order, and

a low-permittivity region being provided in at least any region around a circuit that is configured to read the electric charges from the sensor pixel and output the pixel signal,

wherein the low-permittivity region comprises an air gap region.

2. The imaging device according to claim 1 , wherein

the sensor pixel includes a photoelectric conversion element, a transfer transistor electrically coupled to the photoelectric conversion element, and a floating diffusion that is configured to temporarily hold the electric charges outputted from the photoelectric conversion element via the transfer transistor, and

the pixel circuit includes a reset transistor that is configured to reset a potential of the floating diffusion to a predetermined potential, an amplification transistor that is configured to generate, as the pixel signal, a signal of a voltage corresponding to a level of the electric charges held in the floating diffusion, and a selection transistor that is configured to control an output timing of the pixel signal from the amplification transistor.

3. The imaging device according to claim 2 , wherein

the first substrate includes a first semiconductor substrate including, on side of a front surface, the photoelectric conversion element, the transfer transistor, and the floating diffusion,

the second substrate includes a second semiconductor substrate including, on side of a front surface, the reset transistor, the amplification transistor, and the selection transistor, and

the second substrate is attached, with side of a back surface opposite to the front surface of the second semiconductor substrate being opposed to the side of the front surface of the first semiconductor substrate.

4. The imaging device according to claim 3 , wherein

the sensor pixel and the pixel circuit are electrically coupled to each other by a through-wiring line provided inside a through-hole that is configured to penetrate the second semiconductor substrate, and

the low-permittivity region is provided at least in a region around the through-wiring line inside the through-hole.

5. The imaging device according to claim 4 , wherein the through-wiring line is configured to electrically couple the floating diffusion and the amplification transistor to each other.

6. The imaging device according to claim 4 , wherein

the first substrate includes the photoelectric conversion element and the transfer transistor for each sensor pixel, and includes the floating diffusion shared by each plurality of the sensor pixels,

the second substrate includes the pixel circuit for each plurality of the sensor pixels sharing the floating diffusion, and

the through-wiring line is configured to electrically couple the floating diffusion shared by each plurality of the sensor pixels and the amplification transistor to each other.

7. The imaging device according to claim 4 , wherein the low-permittivity region is provided at least in a region between the through-wiring line and the second semiconductor substrate.

8. The imaging device according to claim 7 , wherein the low-permittivity region is provided in a region surrounding the through-wiring line over an entire periphery thereof.

9. The imaging device according to claim 4 , wherein the low-permittivity region is provided in a region along an inner periphery of the through-hole.

10. The imaging device according to claim 9 , wherein the low-permittivity region is provided in a region corresponding to a sidewall on an inner surface of the through-hole.

11. The imaging device according to claim 9 , wherein a plurality of the through-wiring lines is provided inside the through-hole.

12. The imaging device according to claim 4 , wherein the low-permittivity region is provided in a region on lateral side of at least one of the reset transistor, the amplification transistor, or the selection transistor.

13. The imaging device according to claim 12 , wherein the low-permittivity region is provided at least in a region corresponding to lateral side of the second semiconductor substrate.

14. The imaging device according to claim 13 , wherein the low-permittivity region is provided in a region surrounded by an insulating material having an etching rate different from an insulating material to fill the through-hole.

15. The imaging device according to claim 4 , wherein the low-permittivity region is provided in a region below at least one of the reset transistor, the amplification transistor, or the selection transistor.

16. The imaging device according to claim 15 , wherein, in a case of a plan view in a stacking direction, the low-permittivity region is provided at least in a planar region where the amplification transistor provided in the second semiconductor substrate and a gate electrode of the transfer transistor provided in the first semiconductor substrate are overlapped each other.

17. The imaging device according to claim 15 , wherein the low-permittivity region is provided to be adjacent to the back surface of the second semiconductor substrate.

18. The imaging device according to claim 4 , wherein the low-permittivity region is provided in a region around a wiring line electrically coupled to the through-wiring line, among wiring lines provided in the second substrate.

19. The imaging device according to claim 1 , wherein the low-permittivity region has a rectangular planar shape.