IP Library Granted Patent US 12,100,713
Granted Patent B2
US 12,100,713 · App. 18/235,146 · Granted Sep 24, 2024

Display device

Inventor: Tadayoshi Katsuta (Tokyo, JP)
Assignee: Japan Display Inc.
H01L27/124G09G3/2096G09G3/3233G09G2320/0247G09G2320/046G09G2330/027
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,100,713
App. No.
18/235,146
Granted
Sep 24, 2024
Kind
B2
Abstract

A display device includes a pixel, a scanning line, a signal line, and a drive circuit configured to be supplied with a first power supply voltage signal of a positive value and a second power supply voltage signal of a negative value. The drive circuit includes: a gate driver configured to supply a scanning signal to the scanning line; a signal line selection circuit configured to supply a pixel signal to the signal line; and a display control circuit. The display control circuit is configured to, at first time in a power-off sequence, supply the first power supply voltage signal to the scanning line, supply a GND potential to the common electrode, and supply an adjustment potential of a positive value to the signal line. The display control circuit is configured to supply the GND potential to the scanning line at second time after the first time.

Claims (18)

1. A display device comprising:

a pixel comprising a pixel transistor and a pixel electrode coupled to a drain of the pixel transistor;

a scanning line coupled to a gate of the pixel transistor;

a signal line coupled to a source of the pixel transistor; and

a drive circuit configured to be supplied with a first power supply voltage signal of a positive value and a second power supply voltage signal of a negative value to drive the pixel transistor,

wherein the drive circuit comprises:

a gate driver configured to supply a scanning signal to the scanning line;

a signal line selection circuit configured to supply a pixel signal to the signal line; and

a display control circuit configured to control the gate driver and the signal line selection circuit,

wherein a holding capacitance is provided between the pixel electrode and a common electrode supplied with a common potential lower than a GND potential in a display operation,

wherein the display control circuit is configured to, at a first time in a power-off sequence, supply the first power supply voltage signal to the scanning line, supply the GND potential to the common electrode, and supply an adjustment potential of a positive value to the signal line, and

wherein the display control circuit is configured to supply the GND potential to the scanning line at a second time after the first time.

2. The display device according to claim 1 ,

wherein the display control circuit maintains a state of supplying the adjustment potential to the signal line during a period from the first time to at least the second time.

3. The display device according to claim 1 ,

wherein the drive circuit comprises a switch circuit configured to supply the adjustment potential to the signal line during a period from the first time to at least the second time, and

wherein the display control circuit turns off the signal line selection circuit during a period from the first time to at least the second time.

4. The display device according to claim 1 , further comprising a driver IC including at least the display control circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2023
From: KATSUTA, TADAYOSHI
To: JAPAN DISPLAY INC.
Reel/Frame 064647/0096 →
Priority Claims (1)
JP 2022-131884 · Aug 22, 2022 · national
Continuity (1)
Related Publication 20240063231A1 · Feb 22, 2024