Self aligned pattern formation post spacer etchback in tight pitch configurations
A method of forming a structure for etch masking that includes forming first dielectric spacers on sidewalls of a plurality of mandrel structures and forming non-mandrel structures in space between adjacent first dielectric spacers. Second dielectric spacers are formed on sidewalls of an etch mask having a window that exposes a connecting portion of a centralized first dielectric spacer. The connecting portion of the centralized first dielectric spacer is removed. The mandrel structures and non-mandrel structures are removed selectively to the first dielectric spacers to provide an etch mask. The connecting portion removed from the centralized first dielectric spacer provides an opening connecting a first trench corresponding to the mandrel structures and a second trench corresponding to the non-mandrel structures.
1. A method of forming a hard mask, comprising:
forming a planar topography comprising at least two first regions, at least two second regions, and at least two third regions, wherein:
each of the first, second and third regions are elongated and disposed in parallel with one another; and
each of the first regions abuts and is disposed between a second region and a third region;
forming a first opening in a layer disposed above the planar topography; and
forming spacers on sidewalls of the first opening to define a second opening, wherein the second opening exposes a portion of only one first region.
2. The method of claim 1 , wherein each of two second regions and each of two third regions abuts a first region.
3. The method of claim 1 , wherein:
the planar topography comprises at least three first regions;
each of two second regions abuts and is disposed between adjacent first regions; and
each of two third regions abuts and is disposed between adjacent first regions.
4. The method of claim 1 , wherein forming the planar topography comprises:
forming mandrels to form the third regions;
forming spacers on sidewalls of the mandrels to form the first regions; and
forming a fill material between the spacers formed on the sidewalls of the mandrels to form the second regions.
5. The method of claim 4 , wherein the first, second and third regions are formed on a hard mask layer.
6. The method of claim 5 , wherein the hard mask layer comprises TiN.
7. The method of claim 1 , further comprising removing material in the exposed portion of the only one first region.
8. The method of claim 1 , wherein forming the planar topography comprises self-aligned double patterning.
9. The method of claim 1 , further comprising:
removing the layer disposed above the planar topography; and
subsequent to removing the layer, removing material in the second and third regions.
10. The method of claim 9 , wherein:
the first, second and third regions are formed on a hard mask layer; and
a pattern formed by removing the material in the second and third regions and removing the material in the exposed portion of the only one first region is transferred to the hard mask layer.
11. The method of claim 9 , wherein a pattern formed by removing the material in the second and third regions and removing the material in the exposed portion of the only one first region corresponds to a metal line pattern in an integrated circuit.
12. The method of claim 9 , wherein removing the layer disposed above the planar topography comprises removing the spacers formed on the sidewalls of the first opening.
13. The method of claim 11 , wherein removing the material in the exposed portion of the only one first region forms a connection between a pair of adjacent metal lines defined by the metal line pattern.
14. The method of claim 9 , wherein removing the material in the second and third regions comprises selectively etching material in the first regions with respect to material in the second and third regions.
15. The method of claim 4 , further comprising:
removing the layer disposed above the planar topography; and
subsequent to removing the layer, removing material in the second and third regions.
16. The method of claim 15 , wherein:
the first, second and third regions are formed on a hard mask layer; and
a pattern formed by removing the material in the second and third regions and removing the material in the exposed portion of the only one first region is transferred to the hard mask layer.
17. The method of claim 15 , wherein a pattern formed by removing the material in the second and third regions and removing the material in the exposed portion of the only one first region corresponds to a metal line pattern in an integrated circuit.
18. The method of claim 15 , wherein removing the layer disposed above the planar topography comprises removing the spacers formed on the sidewalls of the first opening.
19. The method of claim 17 , wherein removing the material in the exposed portion of the only one first region forms a connection between a pair of adjacent metal lines defined by the metal line pattern.
20. The method of claim 15 , wherein removing the material in the second and third regions comprises selectively etching material in the first regions with respect to material in the second and third regions.
21. A method of forming a hard mask, comprising:
forming a planar topography comprising at least two first regions, at least two second regions, and at least two third regions, wherein:
each of the first, second and third regions are elongated in a first direction and disposed in parallel with one another; and
each of the first regions abuts and is disposed between a second region and a third region;
forming a first opening in a layer disposed above the planar topography; and
forming spacers on sidewalls of the first opening extending in the first direction to define a second opening, wherein the second opening exposes a portion of a single first region.