IP Library Granted Patent US 12,160,697
Granted Patent B2
US 12,160,697 · App. 18/138,533 · Granted Dec 3, 2024

Device identification for a system of electronic devices

Inventors: Jason Joseph LeBlanc (Castro Valley, CA); Rohan Gupta (Union City, CA); Robert D. Zupke (San Jose, CA); Todd K. Moyer (Portland, OR); Cuneyt Bakan (Santa Clara, CA); Brooke L. Bunney (Mountain View, CA); Justin T. Ng (Temple City, CA); Jeff A. Kalt (San Francisco, CA); Tian Shi Li (Campbell, CA); Lionel B. Barrow (Oakland, CA)
Assignee: Apple Inc.
H04R1/1041H04R1/1066H04R1/1091
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,160,697
App. No.
18/138,533
Granted
Dec 3, 2024
Kind
B2
Abstract

A detachable headband for a headphone system can incorporate a headband identification circuit that stores or encodes a headband identification parameter value. When the headband becomes attached to an ear cup, the headband can transmit the headband identification parameter value to the ear cup.

Claims (45)

1. An electronic device comprising:

a first connector assembly disposed at a first end location;

a second connector assembly disposed at a second end location;

a set of data lines connected between the first connector assembly and the second connector assembly, the set of data lines including a first data line; and

an identification circuit coupled to the first data line and configured to generate an identification pulse pattern on the first data line.

2. The electronic device of claim 1 wherein the identification circuit is disposed on a printed circuit board in the first connector assembly.

3. The electronic device of claim 1 wherein the identification pulse pattern includes a predetermined number of pulses that the identification circuit is configured to generate.

4. The electronic device of claim 1 wherein the identification circuit includes:

a switch coupled between the first data line and ground; and

control logic configured to toggle the switch between an open state and a closed state, thereby generating a predetermined number of pulses on the first data line.

5. The electronic device of claim 4 wherein the switch comprises a transistor and the control logic is coupled to a gate terminal of the transistor.

6. The electronic device of claim 4 wherein the identification circuit further comprises a capacitor coupled to the first data line and configured to provide operating power to the control logic.

7. The electronic device of claim 1 wherein the set of data lines further includes a second data line and wherein the identification circuit is further coupled to the second data line and further configured to generate the identification pulse pattern by generating voltage differences between the first data line and the second data line.

8. The electronic device of claim 1 wherein the identification circuit is configured to generate the identification pulse pattern in response to a first external device becoming connected to the first connector assembly and a second external device becoming connected to the second connector assembly.

9. A first electronic device comprising:

a connector configured to detachably attach to a connector assembly of a second electronic device, the connector including a data contact configured to couple to a data line of the second electronic device;

a receiver circuit coupled to the connector and configured to receive an identification pulse pattern via the data contact, the identification pulse pattern including a number of pulses, wherein the number of pulses is at least two; and

a controller coupled to the receiver circuit and configured to determine an identification parameter value for the second electronic device based at least in part on the number of pulses in the identification pulse pattern.

10. The first electronic device of claim 9 further comprising:

a communication interface coupled to the controller and configured to communicate with a host device,

wherein the controller is further configured to send the identification parameter value to the host device via the communication interface.

11. The first electronic device of claim 10 wherein the controller is further configured to modify a behavior of the first electronic device based on the identification parameter value.

12. A system comprising:

a connecting device having:

a first connector assembly disposed at a first end location;

a second connector assembly disposed at a second end location;

a set of data lines connected between the first connector assembly and the second connector assembly, the set of data lines including a first data line; and

an identification circuit coupled to the first data line and configured to generate an identification pulse pattern on the first data line;

a first end device having:

a third connector assembly configured to detachably attach to the first connector assembly of the connecting device, the third connector assembly including a data contact configured to couple to the first data line of the connecting device;

a receiver circuit coupled to the third connector assembly and configured to receive an identification pulse pattern via the data contact; and

a controller coupled to the receiver circuit and configured to determine an identification parameter value for the connecting device based on the identification pulse pattern; and

a second end device having a fourth connector assembly configured to detachably attach to the second connector assembly of the connecting device, the second connector assembly including a data contact configured to couple to the first data line of the connecting device.

13. The system of claim 12 wherein the identification circuit is disposed on a printed circuit board in the first connector assembly.

14. The system of claim 12 wherein the identification pulse pattern includes a predetermined number of pulses that the identification circuit is configured to generate.

15. The system of claim 12 wherein the identification circuit includes:

a switch coupled between the first data line and ground; and

control logic configured to toggle the switch between an open state and a closed state, thereby generating a predetermined number of pulses on the first data line.

16. The system of claim 15 wherein the switch comprises a transistor and the control logic is coupled to a gate terminal of the transistor.

17. The system of claim 15 wherein the identification circuit further comprises a capacitor coupled to the first data line and configured to provide operating power to the control logic.

18. The system of claim 12 wherein the set of data lines further includes a second data line and wherein the identification circuit is further coupled to the second data line and further configured to generate the identification pulse pattern by generating voltage differences between the first data line and the second data line.

19. The system of claim 12 wherein the identification circuit is configured to generate the identification pulse pattern in response to the first end device becoming connected to the first connector assembly and the second end device becoming connected to the second connector assembly.

20. The system of claim 12 wherein one of the first end device or the second end device includes:

a communication interface coupled to the controller and configured to communicate with a host device,

wherein the controller is further configured to send the identification parameter value to the host device via the communication interface.

Continuity (3)
Continuation 17447895 · Sep 16, 2021
Provisional Application 63079397 · Sep 16, 2020
Related Publication 20230262375A1 · Aug 17, 2023