IP Library Granted Patent US 12,216,913
Granted Patent B2
US 12,216,913 · App. 17/888,426 · Granted Feb 4, 2025

System and method of providing atomicity to large writes to persistent memory

Inventors: Angel Benedicto Aviles, Jr. (San Jose, CA); Vinod Kumar Daga (Santa Clara, CA); Vamsikrishna Sadhu (Santa Clara, CA); Tejas Hunsur Krishna (Sunnyvale, CA)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F3/0619G06F3/0631G06F3/0685
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Quick Facts
Patent No.
US 12,216,913
App. No.
17/888,426
Granted
Feb 4, 2025
Kind
B2
Abstract

A system and a method are disclosed that provides atomicity for large data writes to persistent memory of an object storage system. A segment of persistent memory is allocated to an application. The persistent memory includes non-volatile memory that is accessible in a random access, byte-addressable manner. The segment of persistent memory is associated with first and second bits of a bitmap. The first bit is set indicating that the segment of persistent memory has been allocated. Data is received from the application for storage in the segment of persistent memory, and the second bit is set indicating that data in the segment of persistent memory has been finalized and is ready for storage in a storage medium that is different from persistent memory. The atomicity of the data in persistent memory may be determined based on the first bit and the second bit being set.

Claims (33)

1. A storage system, comprising:

a storage medium;

memory comprising non-volatile memory that is accessible in a random access, byte-addressable manner; and

a controller coupled to the storage medium and the memory, the controller being configured to determine a modification of data of an application stored in a segment of the memory based on a first indication in the memory that the segment of the memory is allocated to the application and on a second indication in the memory that the data in the segment of the memory is for storage in the storage medium, wherein the first and second indications comprise bits associated with a cache line and a data structure.

2. The storage system of claim 1 , wherein the controller is further configured to allocate the segment of the memory to the application in response to a request received from the application.

3. The storage system of claim 2 , wherein the controller is further configured to store the data in the segment of the memory in the storage medium based on the second indication.

4. The storage system of claim 3 , wherein the memory further comprises multiple segments, a size of a first segment of the multiple segments having a same size as a second segment of the multiple segments, and

wherein the first segment is associated with a corresponding first indication and a corresponding second indication.

5. The storage system of claim 4 , wherein the first indication and the second indication comprise metadata associated with data of the application stored in the first segment.

6. The storage system of claim 1 , wherein the memory further comprises random access memory having a power supply with battery backup, a non-volatile dual inline memory (NVDIMM) or a storage class memory (SCM).

7. The storage system of claim 1 , wherein the storage medium comprises a solid-state drive (SSD) or a hard drive (HD).

8. A storage system, comprising:

a storage medium;

memory comprising non-volatile memory that is accessible in a random access, byte-addressable manner; and

a controller coupled to the storage medium and the memory, the controller being configured to:

allocate a segment of the memory to an application, the segment of the memory being associated with a first indication in the memory and a second indication in the memory, and

determine a modification of data of the application stored in the memory based on the first indication in the memory that a segment of memory is allocated to the application and on the second indication in the memory that the data in the segment of memory is for storage in the storage medium, wherein the first and second indications comprise bits associated with a cache line and a data structure.

9. The storage system of claim 8 , wherein the controller is further configured to store the data in the segment of the memory in the storage medium based on the second indication.

10. The storage system of claim 8 , wherein the memory further comprises multiple segments in which a size of a first segment comprises a same size as a second segment, and

wherein the first segment is associated with a corresponding first indication and a corresponding second indication.

11. The storage system of claim 10 , wherein the first indication and the second indication comprise metadata associated with data of the application stored in the first segment.

12. The storage system of claim 8 , wherein the memory further comprises random access memory having a power supply with battery backup.

13. The storage system of claim 8 , wherein the memory comprises a non-volatile dual inline memory (NVDIMM) or a storage class memory (SCM).

14. The storage system of claim 8 , wherein the storage medium comprises a solid-state drive (SSD) or a hard drive (HD).

15. A method to provide atomicity for data writes to a storage system, the method comprising:

allocating a segment of a memory to an application, the memory comprising non-volatile memory that is accessible in a random access, byte-addressable manner, and the segment of the memory being associated with a first indication in the memory and a second indication in the memory; and

determining a modification of data of the application stored in the memory based on the first indication in the memory that a segment of memory is allocated to the application and on the second indication in the memory that the data in the segment of memory is ready for storage in a storage medium that is different from the memory, wherein the first and second indications comprise bits associated with a cache line and a data structure.

16. The method of claim 15 , further comprising storing the data in the segment of the memory in the storage medium based on the second indication.

17. The method of claim 15 , wherein the memory further comprises multiple segments in which a first segment comprises a same size as a second segment, and

wherein the first segment is associated with a corresponding first indication and a corresponding second indication.

18. The method of claim 17 , wherein the first indication and the second indication comprise metadata associated with data of the application stored in the first segment.

19. The method of claim 15 , wherein the memory further comprises random access memory having a power supply with battery backup, a non-volatile dual inline memory (NVDIMM) or a storage class memory (SCM).

20. The method of claim 15 , wherein the storage medium comprises a solid-state drive (SSD) or a hard drive (HD).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2023
From: AVILES, ANGEL BENEDICTO, JR.; DAGA, VINOD KUMAR; SADHU, VAMSIKRISHNA; HUNSUR KRISHNA, TEJAS
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 064797/0024 →
Continuity (3)
Continuation 16795562 · Feb 19, 2020
Provisional Application 62959869 · Jan 10, 2020
Related Publication 20220391105A1 · Dec 8, 2022
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