IP Library Granted Patent US 12,224,017
Granted Patent B2
US 12,224,017 · App. 17/942,977 · Granted Feb 11, 2025

Read level compensation for partially programmed blocks of memory devices

Inventors: Nagendra Prasad Ganesh Rao (Folsom, CA); Paing Z. Htet (Union City, CA); Sead Zildzic, Jr. (Folsom, CA); Thomas Fiala (Folsom, CA); Jian Huang (Union City, CA); Zhenming Zhou (San Jose, CA)
Assignee: Micron Technology, Inc.
G11C16/26G11C16/08G11C16/16
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Quick Facts
Patent No.
US 12,224,017
App. No.
17/942,977
Granted
Feb 11, 2025
Kind
B2
Abstract

A system can include a memory device containing blocks made up of wordlines respectively connected to sets of memory cells, and a processing device, operatively coupled with the memory device to perform operations including responsive to receiving a read request that specifies a block, determining a value of a metric reflective of a number of programmed wordlines of the block. The operations can also include responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric, and performing, using the read voltage offset, a read operation responsive to the read request.

Claims (41)

1. A system comprising:

a memory device comprising a plurality of blocks, each block of the plurality of blocks comprising a plurality of wordlines, each wordline of the plurality of wordlines connected to a respective set of memory cells; and

a processing device, operatively coupled with the memory device to perform operations comprising:

responsive to receiving a read request that specifies a block, determining a value of a metric reflective of a number of programmed wordlines of the block;

responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric; and

performing, using the read voltage offset, a read operation responsive to the read request.

2. The system of claim 1 , wherein identifying the read voltage offset comprises:

identifying, in a metadata structure, a record associating the value of the metric and the corresponding read voltage offset.

3. The system of claim 1 , wherein determining whether the block is in a partially programmed state comprises:

determining whether at least one wordline in the block is connected to a corresponding set of erased memory cells.

4. The system of claim 1 , wherein determining the value of the metric comprises:

identifying the value in a metadata structure.

5. The system of claim 4 , wherein the metadata structure is stored in a local memory.

6. The system of claim 4 , the metadata structure is stored on the memory device.

7. The system of claim 1 , wherein the metric reflects a ratio of the number of programmed wordlines of the block to a total number of wordlines of the block.

8. A method comprising:

responsive to receiving a read request that specifies a block within a plurality of blocks of a memory device, determining a value of a metric reflective of a number of programmed wordlines of the block;

responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric; and

performing, using the read voltage offset, a read operation responsive to the read request.

9. The method of claim 8 , wherein identifying the read voltage offset comprises:

identifying, in a metadata structure, a record associating the value of the metric and the corresponding read voltage offset.

10. The method of claim 8 , wherein determining whether the block is in a partially programmed state comprises:

determining whether at least one wordline in the block is connected to a corresponding set of erased memory cells.

11. The method of claim 8 , wherein determining the value of the metric comprises:

identifying the value in a metadata structure.

12. The method of claim 11 , wherein the metadata structure is stored in a local memory.

13. The method of claim 11 , wherein the metadata structure is stored on the memory device.

14. The method of claim 8 , wherein the metric reflects a ratio of the number of programmed wordlines of the block to a total number of wordlines of the block.

15. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

receiving a read request that specifies a block within a plurality of blocks, the block comprising a plurality of wordlines on a memory device;

responsive to receiving the read request, determining a value of a metric reflective of a number of programmed wordlines of the block;

responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric; and

issuing, to the memory device, a read command comprising the read voltage offset.

16. The non-transitory computer-readable storage medium of claim 15 , wherein identifying the read voltage offset comprises:

identifying, in a metadata structure, a record associating the value of the metric and the corresponding read voltage offset.

17. The non-transitory computer-readable storage medium of claim 15 , wherein determining whether the block is in a partially programmed state comprises:

determining whether at least one wordline of the block is connected to a corresponding set of erased memory cells.

18. The non-transitory computer-readable storage medium of claim 15 , wherein determining the value of the metric comprises:

identifying the value in a metadata structure.

19. The non-transitory computer-readable storage medium of claim 18 , wherein the metadata structure is stored in a local memory.

20. The non-transitory computer-readable storage medium of claim 18 , wherein the metric is a count of programmed wordlines of the block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2022
From: RAO, NAGENDRA PRASAD GANESH; HTET, PAING Z.; ZILDZIC, SEAD, JR.; FIALA, THOMAS; HUANG, JIAN; ZHOU, ZHENMING
To: MICRON TECHNOLOGY, INC.
Reel/Frame 061235/0620 →
Continuity (1)
Related Publication 20240087655A1 · Mar 14, 2024
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