Manufacturing a semiconductor structure
A method of manufacturing a semiconductor structure comprising: depositing a first layer in contact with a first surface area of a substrate; depositing a second layer in contact with a second surface area of the substrate, the second surface area substantially co-planar with and outwards of the first surface area; depositing a third layer in contact with the first layer and the second layer; removing a portion of the third layer to expose a portion of the first layer; and removing at least a portion of the first layer to create a cavity between the substrate, the second layer and the third layer.
1. A method of manufacturing a semiconductor structure, comprising:
(i) depositing a first layer in contact with a first surface area of a substrate, the substrate being of a first semiconductor material and the first layer being of a second semiconductor material;
(ii) depositing a second layer in contact with a second surface area of the substrate, the second surface area substantially co-planar with and outwards of the first surface area, and the second layer being of the first semiconductor material or a third semiconductor material;
(iii) depositing a third layer in contact with the first layer and the second layer, the third layer being of the first semiconductor material or the third semiconductor material or a fourth semiconductor material;
(iv) removing a portion of the third layer to expose a portion of the first layer; and
(v) removing at least a portion of the first layer to create a cavity between the substrate, the second layer and the third layer.
2. The method of claim 1 , wherein the first semiconductor material comprises indium phosphide.
3. The method of claim 1 , wherein the second semiconductor material is a tertiary alloy or a quaternary alloy, the second semiconductor material not comprising indium phosphide.
4. The method of claim 1 , wherein the first layer has a first thickness and the second layer has a second thickness substantially equal to the first thickness.
5. The method of claim 1 , comprising removing an outer portion of the first layer to expose the second surface area.
6. The method of claim 5 , wherein removing comprises an etching process.
7. The method of claim 6 , wherein the etching process is a dry etching process.
8. The method of claim 1 , comprising depositing the second layer to abut a side surface of the first layer.
9. The method of claim 1 , wherein removing a portion of the third layer comprises selectively etching a portion of the third layer using a mask.
10. The method of claim 9 , wherein the selective etching comprises a dry etching process, a wet etching process, or a combination of wet and dry etching processes.
11. The method of claim 1 , wherein removing the at least a portion of the first layer comprises applying an etchant that preferentially etches the second material with respect to the first material.
12. The method of claim 1 , wherein at least one of the third or fourth semiconductor material comprises one or more of: indium phosphide, gallium arsenide, gallium nitride or gallium antimonide.
13. The method of claim 1 , comprising after v), at least partly filling the cavity with a dielectric material.
14. The method of claim 13 , wherein the dielectric material comprises one or more of: benzocyclobutene (BCB), polymethylmethacrylate (PMMA), or SU-8.
15. The method of claim 1 , wherein an upper surface of the second layer is co-planar with an upper surface of the first layer.
16. The method of claim 1 , wherein the third layer is a membrane for a laser.
17. The method of claim 16 , wherein the membrane comprises a gain material for a laser.
18. The method of claim 17 , wherein the semiconductor structure is usable as a membrane laser.
19. The method of claim 13 , wherein the dielectric material is at least one of: a material other than air, a solid, or a polymer.
20. The method of claim 1 , comprising, after v), at least partly filling the cavity with at least one of: a material other than air, a solid material, a polymer material.