IP Library Granted Patent US 12,288,592
Granted Patent B2
US 12,288,592 · App. 17/873,991 · Granted Apr 29, 2025

Performing sense operations in memory

Inventors: Michele Maria Venturini (Milan, IT); Umberto Di Vincenzo (Capriate San Gervasio, IT); Ferdinando Bedeschi (Biassono, IT); Riccardo Muzzetto (Arcore, IT); Christophe Vincent Antoine Laurent (Agrate Brianza, IT); Christian Caillat (Boise, ID)
Assignee: Micron Technology, Inc.
G11C29/50004G11C2029/5004
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Quick Facts
Patent No.
US 12,288,592
App. No.
17/873,991
Granted
Apr 29, 2025
Kind
B2
Abstract

Apparatuses, methods, and systems for performing sense operations in memory are disclosed. The memory can have a group of memory cells, and circuitry can be configured to perform a sense operation on the group, wherein performing the sense operation includes performing a first sense operation in a first polarity on the group of memory cells to determine a quantity of the memory cells of the group that are in a particular data state, and performing a second sense operation in a second polarity on the group of memory cells to determine a data state of the memory cells of the group. The second polarity is opposite the first polarity, and the second sense operation is a count-based sense operation that uses the determined quantity of memory cells in the particular data state as a counting threshold to determine the data state of the memory cells of the group.

Claims (62)

1. An apparatus, comprising:

a memory having a group of memory cells; and

circuitry configured to perform a sense operation on the group of memory cells, wherein performing the sense operation includes:

performing a first sense operation in a first polarity on the group of memory cells to determine a quantity of the memory cells of the group that are in a particular data state; and

performing a second sense operation in a second polarity on the group of memory cells to determine a data state of the memory cells of the group, wherein:

the second polarity is opposite the first polarity;

the second sense operation is a count-based sense operation that uses the determined quantity of memory cells in the particular data state as a counting threshold to determine the data state of the memory cells of the group; and

the determined data states of the memory cells of the group are one of three possible data states, wherein the three possible data states include:

a first data state, wherein the first data state is associated with a first threshold voltage distribution whose magnitude is greater for the first polarity than the second polarity;

a second data state, wherein the second data state is associated with a second threshold voltage distribution whose magnitude is greater for the second polarity than the first polarity; and

a third data state associated with a third threshold voltage distribution whose magnitude is equal for the first polarity and the second polarity.

2. The apparatus of claim 1 , wherein the circuitry is configured to store the determined quantity of memory cells in the particular data state in the group of memory cells.

3. The apparatus of claim 1 , wherein the particular data state is a set data state.

4. The apparatus of claim 1 , wherein:

the first polarity is a negative polarity; and

the second polarity is a positive polarity.

5. The apparatus of claim 1 , wherein the circuitry is configured to perform an error correction operation on the determined data states of the memory cells of the group.

6. The apparatus of claim 1 , wherein the memory cells of the group are self-selecting memory cells in which a single material serves as a select element and a storage element.

7. The apparatus of claim 6 , wherein the single material is a chalcogenide material.

8. A method of operating memory, comprising;

performing a sense operation on a group of memory cells, wherein performing the sense operation includes:

performing a first sense operation in a first polarity on the group of memory cells, wherein performing the first sense operation on the group of memory cells comprises executing a forward looking algorithm;

determining a quantity of the memory cells of the group that snap back during the first sense operation; and

performing a second sense operation in a second polarity on the group of memory cells to determine a data state of the memory cells of the group, wherein:

performing the second sense operation on the group of memory cells comprises executing a counter-based algorithm;

the second polarity is opposite the first polarity; and

the second sense operation is a count-based sense operation that uses the determined quantity of memory cells that snap back as a counting threshold to determine the data state of the memory cells of the group.

9. The method of claim 8 , wherein the method includes storing the determined quantity of memory cells that snap back in the group of memory cells.

10. The method of claim 8 , wherein the determined data states of the memory cells of the group are one of three possible data states.

11. The method of claim 10 , wherein the three possible data states include:

a first data state, wherein the first data state is associated with a first threshold voltage distribution whose magnitude is greater for the first polarity than the second polarity;

a second data state, wherein the second data state is associated with a second threshold voltage distribution whose magnitude is greater for the second polarity than the first polarity; and

a third data state associated with a third threshold voltage distribution whose magnitude is equal for the first polarity and the second polarity.

12. An apparatus, comprising:

a memory having a group of memory cells; and

circuitry configured to:

program data to the group of memory cells, wherein:

the data programmed to the group of memory cells is balanced between a first data state and a second data state;

the data programmed to the group of memory cells includes data programmed to a third data state; and

a quantity of the memory cells of the group programmed to the third data state is less than a quantity of the memory cells of the group programmed to the first data state and a quantity of the memory cells of the group programmed to the second data state; and

perform a sense operation on the group of memory cells, wherein performing the sense operation includes:

performing a first sense operation in a first polarity on the group of memory cells; and

performing a second sense operation in a second polarity on the group of memory cells to determine a data state of the memory cells of the group, wherein:

the second polarity is opposite the first polarity; and

the second sense operation is a count-based sense operation that uses the quantity of the memory cells of the group programmed to the first data state or the quantity of the memory cells of the group programmed to the second data state as a counting threshold to determine the data state of the memory cells of the group.

13. The apparatus of claim 12 , wherein the quantity of the memory cells of the group programmed to the first data state and the quantity of the memory cells of the group programmed to the second data state are equal.

14. The apparatus of claim 12 , wherein the circuitry is configured to store the quantity of the memory cells of the group programmed to the first data state and the quantity of the memory cells of the group programmed to the second data state in additional memory cells of the memory.

15. The apparatus of claim 12 , wherein the group of memory cells comprises a codeword.

16. The apparatus of claim 12 , wherein the memory has a three-dimensional vertical pillar architecture.

17. A method of operating memory, comprising:

programming data to a group of memory cells, wherein programming the data includes balancing the data programmed to the group of memory cells between a first data state and a second data state; and

performing a sense operation on the group of memory cells to determine an average threshold voltage of the memory cells of the group, wherein performing the sense operation includes:

performing a first sense operation in a first polarity on the group of memory cells; and

performing a second sense operation in a second polarity on the group of memory cells to determine a data state of the memory cells of the group, wherein:

the second polarity is opposite the first polarity;

the second sense operation is a count-based sense operation that uses a quantity of the memory cells of the group programmed to the first data state or a quantity of the memory cells of the group programmed to the second data state as a counting threshold to determine the data state of the memory cells of the group; and

the second sense operation uses the determined average threshold voltage as a reference voltage to determine the data state of the memory cells of the group.

18. The method of claim 17 , wherein balancing the data programmed to the group of memory cells comprises applying a balancing algorithm to the data.

19. The method of claim 17 , wherein:

the data programmed to the group of memory cells includes data programmed to a third data state; and

a quantity of the memory cells of the group programmed to the third data state is less than the quantity of the memory cells of the group programmed to the first data state and the quantity of the memory cells of the group programmed to the second data state.

20. The method of claim 17 , wherein a sense window of the first sense operation is larger than a sense window of the second sense operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2022
From: VENTURINI, MICHELE MARIA; DI VINCENZO, UMBERTO; BEDESCHI, FERDINANDO; MUZZETTO, RICCARDO; LAURENT, CHRISTOPHE VINCENT ANTOINE; CAILLAT, CHRISTIAN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 060628/0906 →
Continuity (1)
Related Publication 20240038322A1 · Feb 1, 2024
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