Memory-interface converter chip
A storage device including a memory interface chip. In some embodiments, the storage device includes: a controller integrated circuit; a first memory die; and a first converter integrated circuit, the first converter integrated circuit having a first external interface and a second external interface, the first external interface being a serial interface, the first external interface being connected to the controller integrated circuit, and the second external interface being a memory interface connecting the first converter integrated circuit to the first memory die.
1. A storage device, comprising:
a controller integrated circuit;
a first memory die and a second memory die;
a first converter integrated circuit; and
a wire bond,
the first converter integrated circuit having a first external interface and a second external interface, wherein the first converter integrated circuit is configured to receive, at the first external interface, a packet comprising an indicator and a packet payload, and wherein the indicator signals that the packet payload comprises interleaved die payloads,
the first external interface being a serial interface,
the first external interface being connected to the controller integrated circuit,
the wire bond being connected to the first converter integrated circuit and to the first memory die, and
the second external interface being a memory interface connecting the first converter integrated circuit to the first memory die.
2. The storage device of claim 1 , wherein the first memory die is a NAND flash memory die.
3. The storage device of claim 2 , wherein the second external interface complies with a Toggle standard or an Open NAND Flash Interface (ONFI) standard.
4. The storage device of claim 1 , comprising a package comprising:
the first memory die;
the first converter integrated circuit; and
a substrate,
the first memory die and the first converter integrated circuit being secured to the substrate.
5. The storage device of claim 1 , wherein the first external interface is a Serial Peripheral Interface (SPI) or a Peripheral Component Interconnect Express (PCle) interface or Universal Chiplet Interconnect Express (UCIE).
6. The storage device of claim 1 , wherein the packet comprises a packet header.
7. The storage device of claim 6 , wherein the packet payload comprises a first die payload, the first die payload comprising a command or data.
8. The storage device of claim 7 , wherein the packet payload further comprises a second die payload, interleaved with the first die payload.
9. The storage device of claim 8 , wherein the packet payload further comprises a third die payload, interleaved with the first die payload and the second die payload.
10. The storage device of claim 9 , wherein the packet header comprises the indicator signaling that the packet payload comprises interleaved die payloads.
11. The storage device of claim 9 , wherein the first memory die has a first die identifier, and the second memory die has a second die identifier, different from the first die identifier.
12. The storage device of claim 11 , wherein the packet header comprises the first die identifier and the second die identifier, the first die identifier and the second die identifier signaling an order of interleaving in the packet payload.
13. The storage device of claim 1 , further comprising:
a second converter integrated circuit; and
a switch,
the first external interface being connected to the controller integrated circuit through the switch, and
the second converter integrated circuit being connected to the controller integrated circuit through the switch.
14. The storage device of claim 1 , further comprising a second converter integrated circuit,
the second converter integrated circuit having a first external interface and a second external interface,
the first external interface of the second converter integrated circuit being a serial interface,
the second external interface of the second converter integrated circuit being a memory interface for connecting the second converter integrated circuit to the second memory die,
the second converter integrated circuit being connected to the controller integrated circuit through the first converter integrated circuit.
15. A method, comprising:
receiving, by a first converter integrated circuit of a storage device, from a controller integrated circuit of the storage device, a packet, through a first external interface of the first converter integrated circuit, the packet comprising a packet header and a packet payload, wherein the packet header comprises an indicator signaling that the packet payload comprises interleaved die payloads; and
transmitting, by the first converter integrated circuit, through a second external interface of the first converter integrated circuit, the packet payload,
the first external interface being a serial interface,
the second external interface being a memory interface connecting the first converter integrated circuit to a first memory die and a second memory die of the storage device, and
the storage device comprising a wire bond, connected to the first converter integrated circuit and to the first memory die.
16. The method of claim 15 , wherein the first memory die is a NAND flash memory die.
17. The method of claim 15 , wherein the first external interface is a Serial Peripheral Interface (SPI) or a Peripheral Component Interconnect Express (PCle) interface.
18. The method of claim 15 , wherein the packet payload comprises:
a first die payload for the first memory die; and
a second die payload for the second memory die of the storage device,
the second die payload being interleaved with the first die payload.
19. A storage device, comprising:
a controller integrated circuit;
a first memory die and a second memory die;
a converter; and
a wire bond,
the converter having a first external interface and a second external interface, wherein the converter is configured to receive, at the first external interface, a packet comprising an indicator and a packet payload, and wherein the indicator signals that the packet payload comprises interleaved die payloads,
the first external interface being a serial interface,
the first external interface being connected to the controller integrated circuit,
the wire bond being connected to the converter and to the first memory die, and
the second external interface being a memory interface connecting the converter to the first memory die.