Clock and data recovery circuit
A clock and data recovery (CDR) circuit includes a low pass filter (LPF) and a charge pump (CP) circuit. The LPF includes a filtering resistor and a filtering capacitor. The CP circuit, coupled to the LPF, includes an operational amplifier, a first high-side switch circuit, a first low-side switch circuit, a second high-side switch circuit, a second low-side switch circuit, a first compensation resistor and a second compensation resistor. The first high-side switch circuit and the first low-side switch circuit are coupled to an output terminal of the operational amplifier. The second high-side switch circuit and the second low-side switch circuit are coupled to a first input terminal of the operational amplifier through the LPF. The first compensation resistor is coupled to the first high-side switch circuit. The second compensation resistor is coupled to the first low-side switch circuit.
1. A clock and data recovery (CDR) circuit, comprising:
a low pass filter (LPF), comprising a filtering resistor and a filtering capacitor;
a charge pump (CP) circuit, coupled to the LPF, comprising:
an operational amplifier;
a first high-side switch circuit, coupled to an output terminal of the operational amplifier;
a first low-side switch circuit, coupled to the output terminal of the operational amplifier;
a second high-side switch circuit, coupled to a first input terminal of the operational amplifier through the LPF;
a second low-side switch circuit, coupled to the first input terminal of the operational amplifier through the LPF;
a first compensation resistor, coupled to the first high-side switch circuit; and
a second compensation resistor, coupled to the first low-side switch circuit.
2. The CDR circuit of claim 1 , wherein a resistance value of the first compensation resistor and a resistance value of the second compensation resistor are substantially equal to a resistance value of the filtering resistor.
3. The CDR circuit of claim 1 , wherein the first compensation resistor is coupled between the first high-side switch circuit and the output terminal of the operational amplifier, and the second compensation resistor is coupled between the first low-side switch circuit and the output terminal of the operational amplifier.
4. The CDR circuit of claim 1 , wherein the second high-side switch circuit and the second low-side switch circuit are coupled to the first input terminal of the operational amplifier through the filtering resistor.
5. The CDR circuit of claim 1 , wherein at least one of the first high-side switch circuit, the first low-side switch circuit, the second high-side switch circuit and the second low-side switch circuit comprises:
a switch element; and
a degeneration resistor, coupled to the switch element.
6. The CDR circuit of claim 5 , wherein the first compensation resistor is coupled to a first terminal of the switch element of the first high-side switch circuit, and the degeneration resistor of the first high-side switch circuit is coupled to a second terminal of the switch element of the first high-side switch circuit.
7. The CDR circuit of claim 5 , wherein the second compensation resistor is coupled to a first terminal of the switch element of the first low-side switch circuit, and the degeneration resistor of the first low-side switch circuit is coupled to a second terminal of the switch element of the first low-side switch circuit.
8. The CDR circuit of claim 1 , wherein a second input terminal of the operational amplifier is coupled to the output terminal of the operational amplifier.
9. The CDR circuit of claim 1 , wherein the CP circuit further comprises:
a high-side current source, coupled to the first high-side switch circuit and the second high-side switch circuit; and
a low-side current source, coupled to the first low-side switch circuit and the second low-side switch circuit.
10. The CDR circuit of claim 1 , further comprising:
a phase detector (PD), coupled to the CP circuit; and
a voltage-controlled oscillator (VCO), coupled between the PD and the LPF.