Method and apparatus for low-complexity symbol-rate receiver digital signal processing
A digital signal processor (DSP) for a receiver and a method for processing signals in a receiver are provided. The DSP comprises a processor configured to: receive a digital signal at a symbol rate in a frequency domain; and compensate an impairment of the digital signal in the frequency domain.
1. A digital signal processor (DSP) for a receiver, comprising:
a processor configured to:
receive a digital signal at a symbol rate in a frequency domain; and
compensate an impairment of the digital signal in the frequency domain by determining, at a 2×2 multiple input multiple output (MIMO), a clock frequency offset estimation Δf clk-est and a carrier frequency offset estimation Δf est in the digital signal, and adjusting a sampling clock frequency of an analog to digital convertor (ADC) of the receiver by a −Δf clk-est .
2. The DSP of claim 1 , further comprising:
compensating, at an In-phase Quadrature Compensation (IQC), the digital signal in frequency domain by a −Δf est .
3. The DSP of claim 1 , wherein the Δf clk-est and the Δf est are determined by correlating in frequency domain, at the 2×2 MIMO, digital signals x and y in time domain in X- and Y-polarizations with a MIMO taps:
[
W
xx
W
xy
W
yx
W
yy
]
X=fft (signalx)
Y=fft (signaly)
where:
W xx =W xy =conj( fft (TrainSeqx· e jπΔft ))
W yy =W yx =conj( fft (TrainSeqy· e jπΔft ))
and where TrainSeqx and TrainSeqy are training sequences or signals x and y in X- and Y-polarizations, respectively, wherein the Δf clk-est and the Δf est correspond to scan values at a maximum correlation peak value.
4. The DSP of claim 3 , wherein compensating the impairment of the digital signal comprises:
equalizing the digital signals in X- and Y-polarizations in frequency domain until a root mean square value of a time domain error signal of the digital signal X- and Y-polarizations is smaller than or equal to a predetermined threshold.
5. The DSP of claim 4 , wherein equalizing the digital signals in X- and Y-polarizations in frequency domain comprises:
correlating the digital signals in X- and Y-polarizations in frequency domain with the MIMO taps, at the MIMO, wherein values of the MIMO taps are:
W xx =W yy =[1 1 1 . . . 1]· H comp ; W xy =W yx =[0 0 0 . . . 0];and
updating the digital signals in X- and Y-polarizations by
X=X·W xx +Y·W yx , Y=X·W xy +Y·W yy
where H comp is a compensation response to compensate non-time-varying fixed impairments.
6. The DSP of claim 5 , further comprising:
updating the MIMO taps by
W xx ( m+ 1)= W xx ( m )+2μ· G{E x ( m ) X *( m )}
W yx ( m+ 1)= W yx ( m )+2μ· G{E x ( m ) Y *( m )}
W xy ( m+ 1)= W xy ( m )+2μ· G{E y ( m ) X *( m )}
W yy ( m+ 1)= W yy ( m )+2μ· G{E y ( m ) Y *( m )}.
where X*(m) and Y*(m) are conjugate of the frequency domain digital signals containing X(m) and Y(m) in x and y polarization respectively,
E x (m) and E y (m) are error signals associated with the frequency domain digital signals X(m) and Y(m) respectively,
G{·} is a gradient constraint, and μ is a step function.
7. The DSP of claim 4 , wherein compensating impairment of the digital signal comprises:
determining a timing error τ Baud of the digital signal; and
tuning, by a loop filter, a voltage-controlled oscillator (VCO) until the timing error is smaller than a predetermined threshold.
8. The DSP of claim 7 , the timing error τ Baud is determined based on
τ
B
a
u
d
=
diff
(
φ
)
_
·
N
2
π
φ
=
unwrap
(
angle
(
fftshift
(
detW
)
)
)
=
2
π
f
τ
=
2
π
(
0
:
N
-
1
)
N
τ
Baud
detW= W xx *W yy −W xy *W yx
where W xx , W yy W xy , W yx are converged MIMO tap values, N is sample data point number, and f=k/Nf s is a frequency of the digital signals, K is an integer smaller than N, fs is a sampling rate equal to a baud rate.
9. The DSP of claim 8 , wherein the loop filter tunes the VCO based on:
loopFilt=sign(τ Baud ( n )−τ Baud ( n− 1))* k p +sign(τ Baud ( n ))* k i
where k p and k i are step sizes.
10. The DSP of claim 7 , wherein the loop filter tunes the VCO based on:
loopFilt=(τ Baud ( n )− T Baud ( n− 1))*μ p +sign(τ Baud ( n ))*μ i
Where μ p and μ i are step sizes.
11. The DSP of claim 7 , further comprising:
suspending MIMO and timing recovery updating; and
determining position of training symbols in the digital signal.
12. The DSP of claim 11 , wherein determining position of training symbols in the digital signal comprises:
correlating timing error recovered digital signal in X- and Y-polarizations in frequency domain with the MIMO taps having values of:
W xx =fft (TrainSeqx)· H xx
W yy =fft (TrainSeqy)· H yy
W xy =fft (TrainSeqx)· H xy
W yx =fft (TrainSeqy)· H yx
where TrainSeqx and TrainSeqy are formed by the training symbols in the X and Y-polarized signals in time domain, and H xx , H yy , H xy , H yx are converged MIMO taps after equalizing the digital signal in X- and Y-polarizations in frequency domain.
13. The DSP of claim 11 , further comprising adjusting, by the 2×2 MIMIO, a framer index corresponding to a timing error shifting amount.
14. The DSP of claim 11 , wherein compensating impairment of the digital signal further comprises:
determining a time domain error of the digital signal X- and Y-polarizations in time domain by using training symbols; and
updating MIMO taps until the time domain error of the digital signal X- and Y-polarizations is smaller than or equal to a second predetermined threshold.
15. The DSP of claim 14 , wherein updating MIMO taps comprises updating the MIMO taps by:
W xx ( m+ 1)= W xx ( m )+2μ· G{E x ( m ) X *( m )}
W yx ( m+ 1)= W yx ( m )+2μ· G{E x ( m ) Y *( m )}
W xy ( m+ 1)= W xy ( m )+2μ· G{E y ( m ) X *( m )}
W yy ( m+ 1)= W yy ( m )+2μ· G{E y ( m ) Y *( m )}.
where X*(m) and Y*(m) are conjugate of the frequency domain digital signals containing X(m) and Y(m) in x and y polarization respectively,
E x (m) and E y (m) are error signals associated with the frequency domain digital signals X(m) and Y(m) respectively,
G{·} is a gradient constraint, and μ is a step function,
wherein initial value of the MIMO taps are as follows:
W xx =H xx
W yy =H yy
W xy =H xy
W yx =H yx .
16. The DSP of claim 14 , wherein the second predetermined threshold is smaller than the predetermined threshold.
17. The DSP of claim 14 further comprising compensating for frequency offset and phase shift of the digital signals using a carrier recovery.
18. A method for processing a digital signal at a digital signal processor (DSP) of a receiver, comprising:
receiving the digital signal at a symbol rate in a frequency domain; and
compensating an impairment of the digital signal in the frequency domain by:
determining, at a 2×2 multiple input multiple output (MIMO), a clock frequency offset estimation Δf clk-est and a carrier frequency offset estimation Δf est in the digital signal, and
adjusting a sampling clock frequency of an analog to digital convertor (ADC) of the receiver by a −Δf clk-est .
19. The method of claim 18 , further comprising:
compensating, at an In-phase Quadrature Compensation (IQC), the digital signal in frequency domain by a −Δf est .
20. The method of claim 18 , wherein the Δf clk-est and the Δf est are determined by correlating in frequency domain, at the 2×2 MIMO, digital signals x and y in time domain in X- and Y-polarizations with a MIMO taps:
[
W
xx
W
xy
W
yx
W
yy
]
X=fft (signalx)
Y=fft (signaly)
where:
W xx =W xy =conj( fft (TrainSeqx· e jπΔft ))
W yy =W yx =conj( ft (TrainSeqy· e jπΔft ))
and where TrainSeqx and TrainSeqy are training sequences or signals x and y in X- and Y-polarizations, respectively, wherein the Δf clk-est and the Δf est correspond to scan values at a maximum correlation peak value.