Advanced power off notification for managed memory
Methods, systems, and devices for advanced power off notification for managed memory are described. An apparatus may include a memory array comprising a plurality of memory cells and a controller coupled with the memory array. The controller may be configured to receive a notification indicating a transition from a first state of the memory array to a second state of the memory array. The notification may include a value, the value comprising a plurality of bits and corresponding to a minimum duration remaining until a power supply of the memory array is deactivated. The controller may also execute a plurality of operations according to an order determined based at least in part on a parameter associated with the memory array and receiving the notification comprising the value.
1. An apparatus, comprising:
a plurality of components configured to perform operations; and
a controller coupled with the plurality of components and a memory system, the controller configured to:
determine a minimum duration to transition the plurality of components from a first power state to a second power state;
transmit, to the memory system, a notification indicating a transition from a first state to a second state of the memory system, the notification comprising a value corresponding to the minimum duration, wherein the value indicates the minimum duration remaining from the notification until a power supply of the memory system is deactivated;
receive a response from the memory system after transmitting the notification, the response comprising a second value corresponding to a second minimum duration associated with executing a plurality of operations at the memory system;
refrain from transmitting a command to the memory system prior to deactivation of the power supply of the memory system based at least in part on transmitting the notification to the memory system; and
transition the plurality of components from the first power state to the second power state and deactivating the power supply of the memory system after the minimum duration based at least in part on transmitting the notification.
2. The apparatus of claim 1 , wherein the apparatus further comprises a cache, and wherein the controller is further configured to:
transfer data stored at the cache to the memory system based at least in part on transmitting the notification.
3. The apparatus of claim 1 , wherein the controller is further configured to:
determine the second value is greater than the value based at least in part on receiving the response from the memory system;
transmit a second notification to the memory system, the second notification comprising the second value indicating the second minimum duration remaining until the power supply of the memory system is deactivated; and
deactivate the power supply of the memory system after the second minimum duration based at least in part on transmitting the second notification.
4. The apparatus of claim 1 , wherein the controller is further configured to:
determine the second value is greater than the value based at least in part on receiving the response from the memory system; and
refrain from transmitting a second notification to the memory system and deactivate the power supply after the minimum duration based at least in part on determining the second value.
5. The apparatus of claim 1 , wherein the controller is further configured to:
determine the second value is less than the value based at least in part on receiving the response from the memory system; and
deactivate the power supply of the memory system after the minimum duration based at least in part on determining the second value.
6. The apparatus of claim 1 , wherein the plurality of operations are associated with maintenance of data stored at the memory system.
7. A non-transitory computer-readable medium storing code comprising instructions, which when executed by a processor of an electronic device comprising a plurality of components and a memory system, cause the electronic device to:
determine a minimum duration to transition the plurality of components from a first power state to a second power state;
transmit, to the memory system, a notification indicating a transition from a first state to a second state of the memory system, the notification comprising a value corresponding to the minimum duration, wherein the value indicates the minimum duration remaining from the notification until a power supply of the memory system is deactivated;
receive a response from the memory system after transmitting the notification, the response comprising a second value corresponding to a second minimum duration associated with executing a plurality of operations at the memory system;
refrain from transmitting a command to the memory system prior to deactivation of the power supply of the memory system based at least in part on transmitting the notification to the memory system; and
transition the plurality of components from the first power state to the second power state and deactivating the power supply of the memory system after the minimum duration based at least in part on transmitting the notification.
8. The non-transitory computer-readable medium of claim 7 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
transfer data stored at a cache to the memory system based at least in part on transmitting the notification.
9. The non-transitory computer-readable medium of claim 7 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
determine the second value is greater than the value based at least in part on receiving the response from the memory system;
transmit a second notification to the memory system, the second notification comprising the second value indicating the second minimum duration remaining until the power supply of the memory system is deactivated; and
deactivate the power supply of the memory system after the second minimum duration based at least in part on transmitting the second notification.
10. The non-transitory computer-readable medium of claim 7 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
determine the second value is greater than the value based at least in part on receiving the response from the memory system; and
refrain from transmitting a second notification to the memory system and deactivate the power supply after the minimum duration based at least in part on determining the second value.
11. The non-transitory computer-readable medium of claim 7 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
determine the second value is less than the value based at least in part on receiving the response from the memory system; and
deactivate the power supply of the memory system after the minimum duration based at least in part on determining the second value.
12. The non-transitory computer-readable medium of claim 7 , wherein the plurality of operations are associated with a maintenance of data stored at the memory system.
13. A method comprising:
determining a minimum duration to transition a plurality of components from a first power state to a second power state;
transmitting, to a memory system, a notification indicating a transition from a first state to a second state of the memory system, the notification comprising a value corresponding to the minimum duration, wherein the value indicates the minimum duration remaining from the notification until a power supply of the memory system is deactivated;
receiving a response from the memory system after transmitting the notification, the response comprising a second value corresponding to a second minimum duration associated with executing a plurality of operations at the memory system;
refraining from transmitting a command to the memory system prior to deactivation of the power supply of the memory system based at least in part on transmitting the notification to the memory system; and
transitioning the plurality of components from the first power state to the second power state and deactivating the power supply of the memory system after the minimum duration based at least in part on transmitting the notification.
14. The method of claim 13 , further comprising:
transferring data stored at a cache to the memory system based at least in part on transmitting the notification.
15. The method of claim 13 , further comprising:
determining the second value is greater than the value based at least in part on receiving the response from the memory system;
transmitting a second notification to the memory system, the second notification comprising the second value indicating the second minimum duration remaining until the power supply of the memory system is deactivated; and
deactivating the power supply of the memory system after the second minimum duration based at least in part on transmitting the second notification.
16. The method of claim 13 , further comprising:
determining the second value is greater than the value based at least in part on receiving the response from the memory system; and
refraining from transmitting a second notification to the memory system and deactivate the power supply after the minimum duration based at least in part on determining the second value.
17. The method of claim 13 , further comprising:
determining the second value is less than the value based at least in part on receiving the response from the memory system; and
deactivating the power supply of the memory system after the minimum duration based at least in part on determining the second value.