IP Library Granted Patent US 12,373,580
Granted Patent B2
US 12,373,580 · App. 18/057,790 · Granted Jul 29, 2025

Using an embedded controller (EC) integrated into a heterogeneous computing platform as a trusted platform module (TPM)

Inventor: Adolfo S. Montero (Pflugerville, TX)
Assignee: Dell Products, L.P.
G06F21/602G06F21/572G06F21/85
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Quick Facts
Patent No.
US 12,373,580
App. No.
18/057,790
Granted
Jul 29, 2025
Kind
B2
Abstract

Systems and methods for using an embedded controller (EC) integrated into a heterogenous computing platform as a Trusted Platform Module (TPM). In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a heterogeneous computing platform having a Reduced Instruction Set Computer (RISC) processor and a plurality of devices coupled thereto; and an EC integrated into the heterogeneous computing platform, wherein the EC is configured to operate as a TPM.

Claims (35)

1. An Information Handling System (IHS), comprising:

a heterogeneous computing platform having a Reduced Instruction Set Computer (RISC) processor and a plurality of devices coupled thereto; and

an embedded controller (EC) integrated into the heterogeneous computing platform, wherein the EC is configured to operate as a Trusted Platform Module (TPM);

wherein the EC is further configured to: receive signals from a user input device, process a thermal measurement, control a cooling fan, throttle the RISC processor, perform an emergency shutdown of the IHS, control an indicator Light-Emitting Diode (LED), and process telemetry from a Battery Management Unit (BMU).

2. The IHS of claim 1 , wherein the heterogeneous computing platform comprises: a System-On-Chip (SoC), a Field-Programmable Gate Array (FPGA), or an Application-Specific Integrated Circuit (ASIC).

3. The IHS of claim 1 , wherein the RISC processor comprises an Advanced RISC Machines (ARM) processor.

4. The IHS of claim 1 , wherein to operate as the TPM, the EC is coupled to an always-on rail of a voltage regulator.

5. The IHS of claim 4 , wherein to operate as the TPM, the EC is further configured to, in response to a reset of the heterogenous computing platform, receive electrical power prior to the RISC processor and the plurality of devices.

6. The IHS of claim 1 , wherein the EC is coupled to an interconnect internal to the heterogeneous computing platform, and wherein the interconnect comprises at least one of: an Advanced Microcontroller Bus Architecture (AMBA) bus, a QuickPath Interconnect (QPI) bus, or a HyperTransport (HT) bus.

7. The IHS of claim 1 , wherein the EC is further configured to cryptographically verify the integrity or authenticity of firmware instructions used by the EC.

8. The IHS of claim 1 , wherein the EC is further configured to store security measurements taken during operation of the IHS in a secure memory.

9. The IHS of claim 1 , wherein the EC is further configured to authenticate an integrity or authenticity of the IHS, at least in part, using a cryptographic key hardwired or burned onto the EC.

10. The IHS of claim 1 , wherein the EC is further configured to receive and execute a TPM command to generate or store a cryptographic key or digital certificate.

11. The IHS of claim 10 , wherein the TPM command is issued by a host Operating System (OS), OS driver, or application.

12. The IHS of claim 10 , wherein the EC is further configured to receive and execute another TPM command to restrict access to the cryptographic key.

13. The IHS of claim 10 , wherein the plurality of devices comprises a Peripheral Component Interconnect Express (PCIe) controller, and wherein the EC is further configured to receive the TPM command originated from a PCIe device via the PCIe controller.

14. The IHS of claim 1 , wherein the EC is further configured to detect a posture of the IHS.

15. The IHS of claim 1 , wherein the EC is further configured to enable remote management of the IHS over a network.

16. The IHS of claim 1 , wherein the EC comprises a processing core integrated into the heterogeneous computing platform and a plurality of peripheral devices coupled to the processing core and integrated into the heterogeneous computing platform.

17. The IHS of claim 16 , wherein the plurality of peripheral devices comprises at least one of: an Inter-Integrated Circuit (I2C) bus controller, a Pulse Width Modulator (PWM), a tachometer (TACH), a General Purpose I/O (GPIO) controller, a serial peripheral interface (SPI) Flash, a fan controller, or an Analog-to-Digital Converter (ADC).

18. An embedded controller (EC) integrated into a heterogeneous computing platform of an Information Handling System (IHS), wherein the IHS comprises a Reduced Instruction Set Computer (RISC) processor and a plurality of devices coupled thereto via an interconnect fabric, and wherein the EC comprises a memory having instructions stored thereon that, upon execution by a core of the EC, cause the EC to:

receive a Trusted Platform Module (TPM) command from a host Operating System (OS), OS driver, or application via an Application Programming Interface (API);

perform a TPM operation based upon the TPM command; and

send a response to the host OS, OS driver, or application, wherein the response comprises a result of the TPM operation;

wherein the EC is further configured to: receive signals from a user input device, process a thermal measurement, control a cooling fan, throttle the RISC processor, perform an emergency shutdown of the IHS, control an indicator Light-Emitting Diode (LED), and process telemetry from a Battery Management Unit (BMU).

19. A method, comprising:

receiving a Trusted Platform Module (TPM) command at an embedded controller (EC) at least partially integrated into a heterogeneous computing platform of an Information Handling System (IHS), wherein the IHS comprises a Reduced Instruction Set Computer (RISC) processor and a plurality of devices coupled thereto via an interconnect, and wherein the firmware instructions, upon execution by the EC, configure the EC to perform a TPM operation corresponding to the TPM command;

transmitting, by the EC, an indication of the TPM operation;

receiving, by the EC, signals from a user input device;

processing, by the EC, a thermal measurement;

controlling, by the EC, a cooling fan;

throttling, by the EC, the RISC processor;

performing, by the EC, an emergency shutdown of the IHS;

controlling, by the EC, an indicator Light-Emitting Diode (LED); and

processing, by the EC, telemetry from a Battery Management Unit (BMU).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2022
From: MONTERO, ADOLFO S.
To: DELL PRODUCTS, L.P.
Reel/Frame 061848/0407 →
Continuity (1)
Related Publication 20240169075A1 · May 23, 2024
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