Neural processor and control method of neural processor
View Patent ↗A neural processor and a control method of the neural processor are provided. The neural processor includes plurality of processing element groups, wherein each of the processing element groups includes a plurality of processing elements configured to perform a vector operation, an overflow accumulator configured to be engaged by a processing element in which an overflow or underflow occurs from among the plurality of processing elements, and a register configured to store information indicating the processing element as an owner processing element.
1. A neural network comprising:
a plurality of processing element groups,
wherein each of the processing element groups comprises:
a plurality of processing elements configured to perform a vector operation;
an overflow accumulator configured to be engaged by a processing element in which an overflow or underflow occurs from among the plurality of processing elements; and
a register configured to store information indicating the processing element from among the plurality of processing element as an owner processing element that is engaging the overflow accumulator.
2. The neural network of claim 1 , wherein the overflow accumulator is further configured to accumulate an operation result of an accumulator of the owner processing element based on information that indicates whether an overflow occurs or whether an underflow occurs and that is received from an accumulator of the owner processing element.
3. The neural network of claim 2 , wherein the information comprises any one or any combination of information indicating that the overflow occurs, information indicating that the underflow occurs, and information indicating that no overflow or underflow occurs.
4. The neural network of claim 1 , wherein the overflow accumulator is directly connected to each of the plurality of processing elements through a pipelined interconnection.
5. The neural network of claim 1 , wherein the neural network is configured to determine, based on the information indicating the owner processing element, whether the overflow accumulator is engaged by at least one of the plurality of processing elements.
6. The neural network of claim 5 , wherein in response to the overflow accumulator being determined to be engaged, the neural network is further configured to:
control “1” to be added to the overflow accumulator based on an overflow signal output from the owner processing element; and
control “1” to be subtracted from the overflow accumulator based on an underflow signal output from the owner processing element.
7. The neural network of claim 5 , wherein in response to the overflow accumulator being determined to be unengaged, the neural network is further configured to set a processing element that outputs an overflow signal or an underflow signal from among the plurality of processing elements as the owner processing element.
8. The neural network of claim 1 , wherein the owner processing element is further configured to output the information indicating the owner processing element together with an operation result of the overflow accumulator and an operation result of the owner processing element in response to a termination of the vector operation.
9. The neural network of claim 1 , wherein each of the plurality of processing elements, other than the owner processing element, are configured to output an operation result of an accumulator of each of the non-owner processing elements in response to a termination of the vector operation.
10. The neural network of claim 1 , wherein in response to the overflow signal or the underflow signal being simultaneously received from at least two processing elements from among the plurality of processing elements, the neural network is configured to randomly set one of the at least two processing elements as the owner processing element.
11. The neural network of claim 1 , wherein the register is further configured to further store information indicating whether an overflow occurs or an underflow occurs in the owner processing element.
12. The neural network of claim 1 , wherein each of the plurality of processing elements comprises a plurality of multipliers, a plurality of adders, and an accumulator.
13. The neural network of claim 1 , wherein each of the plurality of processing elements comprises a multiplier-adder tree (MAT), an adder, and an accumulator.
14. The neural network of claim 1 , wherein the overflow accumulator comprises an accumulator and an adder.
15. A control method of a neural network, the method comprising:
determining whether an overflow accumulator shared by a plurality of processing elements that perform a vector operation is engaged by at least one of the plurality of processing elements;
setting, a processing element that outputs an overflow signal or an underflow signal from among the plurality of processing elements as an owner processing element that engages the overflow accumulator, in response to the overflow accumulator being determined to be unengaged;
controlling the overflow accumulator to be added or subtracted based on a signal output from the owner processing element that engages the overflow accumulator, in response to the overflow accumulator being determined to be engaged; and
outputting information indicating the owner processing element together with an operation result of the overflow accumulator and an operation result of the owner processing element, in response to a termination of the vector operation.
16. The method of claim 15 , wherein the determining comprises determining, based on the information indicating the owner processing element, whether the overflow accumulator is engaged by at least one of the plurality of processing elements.
17. The method of claim 15 , wherein the controlling comprises, in response to the overflow accumulator being determined to be engaged:
adding “1” to the overflow accumulator based on an overflow signal output from the owner processing element; and
subtracting “1” from the overflow accumulator based on an underflow signal output from the owner processing element.
18. The method of claim 15 , wherein the outputting comprises outputting a result obtained by summing data of the overflow accumulator and an operation result of the owner processing element through a pipelined interconnection that vertically connects the owner processing element and the overflow accumulator, where the plurality of processing elements and the overflow accumulator are directly connected to each other through the pipelined interconnection.
19. The method of claim 15 , further comprising:
randomly setting one of the at least two processing elements as the owner processing element, in response to the overflow signal or the underflow signal being simultaneously received from at least two processing elements among the plurality of processing elements.
20. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform the method of claim 15 .