Hybrid ultrasonic transducer system

1. A method of forming an integrated chip structure, comprising:

forming one or more PMUT cavities within a first dielectric stack on a substrate;

forming a first plurality of isolation cavities within the first dielectric stack;

forming one or more CMUT cavities within a second dielectric stack on a MEMS substrate;

forming a second plurality of isolation cavities within the second dielectric stack; and

performing a bonding process that brings the first dielectric stack together with the second dielectric stack to form a dielectric stack between the substrate and the MEMS substrate, wherein the bonding process also brings together the first plurality of isolation cavities and the second plurality of isolation cavities to form a plurality of isolation chambers laterally between the one or more PMUT cavities and the one or more CMUT cavities.

2. The method of claim 1 , wherein the plurality of isolation chambers are also laterally between adjacent ones of the one or more PMUT cavities.

3. The method of claim 1 , further comprising:

filling one or more of the first plurality of isolation cavities with an acoustic wave absorption material.

4. The method of claim 1 , wherein the plurality of isolation chambers respectively have a height that is greater than or equal to a height of the one or more PMUT cavities or the one or more CMUT cavities.

5. The method of claim 1 ,

wherein the one or more PMUT cavities are vertically below the one or more CMUT cavities; and

wherein the plurality of isolation chambers vertically extend past a top of the one or more PMUT cavities and a bottom of the one or more CMUT cavities.

6. The method of claim 1 , further comprising:

forming a first seal ring structure along opposing sides of the substrate;

forming a second seal ring structure along opposing sides of the MEMS substrate; and

bringing the first seal ring structure together with the second seal ring structure to form a seal ring structure.

7. A method of forming an integrated chip structure, comprising:

forming a plurality of interconnects within a first dielectric stack on a first substrate;

forming piezoelectric ultrasonic transducer (PMUT) cavity within the first dielectric stack;

forming a first isolation cavity within the first dielectric stack, the first isolation cavity laterally between the plurality of interconnects and the PMUT cavity;

forming a piezoelectric stack onto a second substrate;

forming a second dielectric stack on the piezoelectric stack and the second substrate;

forming a capacitive ultrasonic transducer (CMUT) cavity within the second dielectric stack;

forming a second isolation cavity within the second dielectric stack, the second isolation cavity laterally separating the CMUT cavity from the piezoelectric stack; and

bonding the first dielectric stack to the second dielectric stack so that the PMUT cavity is vertically separated from the piezoelectric stack by the second dielectric stack, the CMUT cavity is vertically separated from the plurality of interconnects by the first dielectric stack, and the first isolation cavity and the second isolation cavity laterally separate the CMUT cavity from the PMUT cavity.

8. The method of claim 7 , wherein the CMUT cavity vertically overlaps the PMUT cavity.

9. The method of claim 7 , wherein the first isolation cavity and the second isolation cavity are brought together to collectively form an isolation chamber during bonding, the isolation chamber having a larger height than either of the CMUT cavity and the PMUT cavity.

10. The method of claim 9 , wherein an acoustic wave absorption material is arranged within the isolation chamber.

11. The method of claim 7 , further comprising:

forming a bottom electrode over the plurality of interconnects within the first dielectric stack; and

forming a top electrode onto the second substrate prior to forming the piezoelectric stack, wherein the CMUT cavity is vertically between the top electrode and the bottom electrode after bonding.

12. The method of claim 11 , wherein the top electrode is arranged within a flexible membrane.

13. The method of claim 11 , wherein the CMUT cavity is vertically separated from the top electrode by a dielectric layer.

14. The method of claim 11 , wherein the first isolation cavity is laterally separated from the bottom electrode by the first dielectric stack.

15. The method of claim 7 , wherein the first isolation cavity extends into the first dielectric stack to a different depth than the PMUT cavity.

16. A method of forming an integrated chip structure, comprising:

forming a bottom electrode within a first dielectric structure on a first substrate;

forming a PMUT cavity within the first dielectric structure, the PMUT cavity being formed by one or more first interior surfaces of the first dielectric structure;

forming a flexible membrane comprising a conductive material on a second substrate;

forming a piezoelectric stack on the flexible membrane;

forming a second dielectric structure on the flexible membrane and the piezoelectric stack;

forming a CMUT cavity within the second dielectric structure, the CMUT cavity being formed by one or more second interior surfaces of the second dielectric structure; and

affixing the first dielectric structure to the second dielectric structure so that the PMUT cavity is below the piezoelectric stack and the CMUT cavity is above the bottom electrode.

17. The method of claim 16 , further comprising:

forming a first isolation cavity within the first dielectric structure, the first isolation cavity laterally separating the bottom electrode from the PMUT cavity; and

forming a second isolation cavity within the second dielectric structure, the second isolation cavity laterally separating the CMUT cavity from the piezoelectric stack.

18. The method of claim 17 , further comprising:

forming an acoustic wave absorption material within the first isolation cavity, wherein the acoustic wave absorption material has an upper surface exposed to an air gap after affixing the first dielectric structure to the second dielectric structure.

19. The method of claim 16 , wherein the CMUT cavity has a greater vertical height than the PMUT cavity.

20. The method of claim 16 , wherein the PMUT cavity is vertically below the CMUT cavity after affixing the first dielectric structure to the second dielectric structure.