Granted Patent B1

US 12,394,015 · App. 18/219,594 · Granted Aug 19, 2025

Inventors: Shiqiu Liu (Santa Clara, CA); Matthieu Le (San Francisco, CA); Andrew Tao (Los Altos, CA)

Assignee: NVIDIA Corporation

G06T3/4046A63F13/50G06F7/57G06N3/08G06T3/4092G06T5/70G06T2207/10016G06T2207/10024G06T2207/20081G06T2207/20084

Abstract

Claims (45)

1. A system-on-a-chip (SoC), comprising:

a central processing unit (CPU);

memory;

a Peripheral Component Interconnect (PCI) communication bus;

an upsampler including at least one neural network to infer a higher resolution image from an input frame, wherein the higher resolution image is to be blended with a prior frame;

and

a graphics processing unit (GPU) including:

a general processing cluster (GPC), where the GPC includes streaming multiprocessors (SMs) comprising:

an instruction cache;

a dispatch unit;

cores;

a load/store unit (LSU);

shared memory; and

an L1 cache.

2. The SoC of claim 1 , wherein the prior frame is a prior inferred frame.

3. The SoC of claim 1 , wherein the SMs further comprise a register file.

4. The SoC of claim 1 , wherein the SMs further comprise one or more special function units (SFUs).

5. The SoC of claim 1 , wherein the SMs each further comprise one or more interconnects.

6. The SoC of claim 1 , wherein the GPC further comprises a raster engine.

7. The SoC of claim 1 , further comprising a hub to interface with one or more GPU interconnects.

8. The SoC of claim 1 , wherein the GPU further comprises an input/output (I/O) unit to interface with the PCI communication bus.

9. The SoC of claim 1 , wherein the GPU further comprises a crossbar (Xbar).

10. The SoC of claim 1 , wherein the GPU further comprises a memory partition unit.

11. A method, comprising:

using a system-on-a-chip (SoC) to perform an upsampler including at least one neural network to infer a higher resolution image from an input frame, wherein the higher resolution image is to be blended with a prior frame and the SoC comprises:

a central processing unit (CPU);

memory;

a Peripheral Component Interconnect (PCI) communication bus; and

a graphics processing unit (GPU) including:

a general processing cluster (GPC), where the GPC includes streaming multiprocessors (SMs) comprising:

an instruction cache;

a dispatch unit;

cores;

a load/store unit (LSU);

shared memory; and

an L1 cache.

12. The method of claim 11 , wherein the prior frame is a prior inferred frame.

13. The method of claim 11 , wherein the prior frame comprises a higher resolution and is to be inferred by the at least one neural network.

14. The method of claim 11 , wherein the higher resolution image is to be blended with pixel values of a prior inferred frame.

15. The method of claim 11 , wherein the GPU further comprises a scheduler unit.

16. The method of claim 11 , wherein the GPC further comprises a raster engine.

17. The method of claim 11 , wherein the SoC further comprises a hub to interface with one or more GPU interconnects.

18. The method of claim 11 , wherein the SoC further comprises a network interface.

19. The method of claim 11 , wherein the SoC further comprises one or more display devices.

20. The method of claim 11 , further comprising inferring the higher resolution image by the at least one neural network based, at least in part, on a lower resolution input frame.

Assignments (1)

Continuity (1)

References Cited (253)