IP Library Granted Patent US 12,394,355
Granted Patent B2
US 12,394,355 · App. 18/608,900 · Granted Aug 19, 2025

Display device and driving method thereof

Inventors: Ji Hyun Ka (Yongin-si, KR); Ki Myeong Eom (Yongin-si, KR); Kyong Hwan Oh (Yongin-si, KR); Hai Jung In (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/2092G09G2310/0267G09G2310/0275G09G2310/0278
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Quick Facts
Patent No.
US 12,394,355
App. No.
18/608,900
Granted
Aug 19, 2025
Kind
B2
Abstract

A display device includes: a first pixel connected to a first data line and a first scan line; a second pixel connected to the first data line and a second scan line; a first scan driver connected to a first scan start line and the first scan line; and a second scan driver connected to a second scan start line and the second scan line. In a first frame period, the second scan start line is to be suppled with a second scan start signal having a turn-on level, after a first period elapses after a first scan start signal having a turn-on level is supplied to the first scan start line. In a second frame period, a difference between a time at which the first scan start signal having the turn-on level is supplied and a time at which the second scan start signal having the turn-on level is supplied corresponds to a second period. The second period is shorter than the first period.

Claims (45)

1. A display device comprising:

a first scan driver connected to a first scan start line and first scan lines;

a second scan driver connected to a second scan start line and second scan lines; and

pixels connected to the first scan lines and the second scan lines,

wherein a pixel of the pixels comprises:

a first transistor;

a second transistor comprising a first electrode connected to a data line, a second electrode connected to a first electrode of the first transistor, and a gate electrode connected to a respective one of the first scan lines; and

a third transistor comprising a first electrode connected to a gate electrode of the first transistor, a second electrode connected to a second electrode of the first transistor, and a gate electrode connected to a respective one of the second scan lines,

wherein, in a first period of a low frequency driving mode, the second scan start line is to be supplied with a second scan start signal having a turn-on level and a first scan start signal having a turn-on level is to be supplied to the first scan start line,

wherein, in a second period of the low frequency driving mode, the second scan start line is to be supplied with the second scan start signal maintaining a turn-off level and the first scan start signal having the turn-on level is to be supplied to the first scan start line, and

wherein the second period is after the first period.

2. The display device of claim 1 ,

wherein the second transistor is a poly-silicon transistor, and

wherein the third transistor is an oxide semiconductor transistor.

3. The display device of claim 1 ,

wherein the pixel further comprises:

a light emitting diode;

a fourth transistor comprising a first electrode connected to the gate electrode of the first transistor, a second electrode connected to an initialization line, and a gate electrode connected to a third scan line;

a fifth transistor comprising a first electrode connected to a first power line, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to an emission line;

a sixth transistor comprising a first electrode connected to the second electrode of the first transistor, a second electrode connected to an anode of the light emitting diode, and a gate electrode connected to the emission line; and

a seventh transistor comprising a first electrode connected to the initialization line, a second electrode connected to the anode of the light emitting diode, and gate electrode connected to a fourth scan line.

4. The display device of claim 3 ,

wherein the first, second, fifth, sixth, and seventh transistors are poly-silicon transistors, and

wherein the third and fourth transistors are oxide semiconductor transistors.

5. The display device of claim 3 , further comprising:

a third scan driver connected to a third scan start line and third scan lines comprising the third scan line; and

a fourth scan driver connected to a fourth scan start line and fourth scan lines comprising the fourth scan line.

6. The display device of claim 1

wherein, in the first period, a first scan clock signal supplied to the first scan driver has a first cycle, and

wherein, in the second period, the first scan clock signal has a second cycle longer than the first cycle.

7. The display device of claim 6 , wherein, in the first period, a second scan clock signal supplied to the second scan driver has the first cycle, and

wherein, in the second period, the second scan clock signal maintains the turn-off level.

8. The display device of claim 7 , further comprising:

a first emission driver connected to a first emission stop line and first emission lines; and

a second emission driver connected to a second emission stop line and second emission lines,

wherein each of the pixels further comprises a transistor connected to a respective one of the first emission lines and or of the second emission lines,

wherein, in the first period, the second emission stop line is to be supplied with a second emission stop signal having a turn-off level, after a third period elapses after a first emission stop signal having a turn-off level is supplied to the first emission stop line,

wherein, in the second period, a difference between a time at which the first emission stop signal having the turn-off level is supplied and a time at which the second emission stop signal having the turn-off level is supplied corresponds to a fourth period, and

wherein the fourth period is shorter than the third period.

9. The display device of claim 8 ,

wherein, in the first period, a first emission clock signal supplied to the first emission driver has a third cycle,

wherein, in the second period, the first emission clock signal has a fourth cycle longer than the third cycle.

10. The display device of claim 9 ,

wherein, in the first period, a second emission clock signal supplied to the second emission driver has the third cycle,

wherein, in the second period, the second emission clock signal has the fourth cycle.

Priority Claims (1)
KR 10-2019-0173279 · Dec 23, 2019 · national
Continuity (3)
Continuation 17850894 · Jun 27, 2022
Continuation 16991860 · Aug 12, 2020
Related Publication 20240221592A1 · Jul 4, 2024
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