Bias circuit for crystal oscillator

1. A bias circuit comprising:

a first current mirror comprising a current source coupled to a first current mirror device, the current source coupled to a first node and a second node of the first current mirror device, wherein the third node of the first current mirror device is coupled to a first fixed voltage;

a second current mirror comprising a second current mirror device and a first cascode device, wherein:

a first node and a second node of the first cascode device are coupled together and comprise a current path;

a first node of the second current mirror device is coupled to a third node of the first cascode device;

a second node of the second current mirror device is coupled to the current source;

a third node of the second current mirror device is coupled to the first fixed voltage;

a third current mirror comprising a third current mirror device and a second cascode device, wherein:

a first node of the second cascode device is coupled to an output driver;

a second node of the second cascode device is coupled to the second node of the first cascode device;

a third node of the second cascode device is coupled to a first node of the third current mirror device;

a second node of the third current mirror device is coupled to the current source;

a third node of the third current mirror device is coupled to the first fixed voltage;

wherein the output driver comprises a first node coupled to the first node of the second cascode device, a second node coupled to a first node of a capacitor, and a third node coupled to a second fixed voltage, the first node of the output driver comprising a first bias output and the second node of the output driver comprising a second bias output; and

wherein the capacitor comprises a first node coupled to a second node of the output driver and a second node coupled to the second node of the second cascode device.

2. The bias circuit as claimed in claim 1 , the first fixed voltage comprising a positive supply voltage.

3. The bias circuit as claimed in claim 1 , the second fixed voltage comprising a negative supply voltage.

4. The bias circuit as claimed in claim 1 , the second fixed voltage comprising a ground return.

5. The bias circuit as claimed in claim 1 , the second fixed voltage comprising a positive supply voltage.

6. The bias circuit as claimed in claim 1 , the current through the current source equal to twice the current through the second current mirror device and the first cascode device.

7. The bias circuit as claimed in claim 1 , the size of the third current mirror device a multiple of the size of the second current mirror device.

8. The bias circuit as claimed in claim 1 , the size of the second cascode device a multiple of the size of the first cascode device.

9. A crystal oscillator system comprising:

a bias circuit to generate a first bias output and a second bias output based on a first current mirror, the first current mirror comprising a current source and a first current mirror device;

a crystal oscillator to receive input from the first bias output and the second bias output and to generate an oscillation output;

the bias circuit comprising a second current mirror to receive input from the current source and a third current mirror to receive input from the current source;

the third current mirror comprising a third current mirror device coupled to a second cascode device and an output driver coupled to the second cascode device, and

a capacitor coupled between a gate of the output driver and the second cascode device.

10. The crystal oscillator system as claimed in claim 9 , the second current mirror comprising a second current mirror device coupled to a first cascode device.

11. The crystal oscillator system as claimed in claim 9 , the first bias output at a zero voltage level at a first time and the first bias output at a non-zero voltage level at a second time, the second time after the first time.

12. The crystal oscillator system as claimed in claim 9 , the second bias output at a zero voltage level at a first time and the second bias output at a non-zero voltage level at a second time, the second time after the first time.

13. The crystal oscillator system as claimed in claim 9 , at a predetermined time, the first bias output at a non-zero voltage level and the second bias output at a zero voltage level.

14. The crystal oscillator system as claimed in claim 9 , at a predetermined time, the first bias output at a zero voltage level and the second bias output at a non-zero voltage level.

15. The crystal oscillator system as claimed in claim 9 , the first bias output and the second bias output to transition to a non-zero voltage level simultaneously.

16. The crystal oscillator system as claimed in claim 9 , the crystal oscillator to oscillate based on the first bias output.

17. The crystal oscillator system as claimed in claim 9 , the crystal oscillator to oscillate based on the second bias output.

18. A method comprising:

generating a reference current in a first current mirror;

generating a first bias output, the first bias output based on the reference current, the first bias output based on a current in a cascode device coupled to a current mirror device directly coupled to the reference current;

generating a second bias output, the second bias output based on the reference current; and

outputting the first bias output and the second bias output to a crystal oscillator, further comprising a capacitor coupled between the second bias output and the cascode device.