IP Library Granted Patent US 12,412,876
Granted Patent B2
US 12,412,876 · App. 18/162,489 · Granted Sep 9, 2025

Semiconductor package

Inventor: Kazuhito Tanaka (Shiga, JP)
Assignee: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.
H01L25/16H01L24/48H01L2224/4814H01L2924/1432H01L2924/1436H01L2924/19043H01L2924/19107
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Quick Facts
Patent No.
US 12,412,876
App. No.
18/162,489
Granted
Sep 9, 2025
Kind
B2
Abstract

A semiconductor package according to the present disclosure includes: a plurality of semiconductor chips that include a system on chip (SoC) in which a plurality of integrated circuits including a processor core and a microcomputer are integrated on a single chip; a power management integrated circuit (IC) for performing power management on the plurality of semiconductor chips; a plurality of shunt resistors each of which is mounted in series on a different one of power wires connecting the power management IC and the plurality of semiconductor chips; two output terminals; and a single selector that outputs voltages at both ends of a shunt resistor to an outside via the two output terminals, the shunt resistor being selected from among the plurality of shunt resistors. The power management IC, the plurality of semiconductor chips, the plurality of shunt resistors, and the single selector are mounted inside a single package.

Claims (26)

1. A semiconductor package comprising:

a plurality of semiconductor chips that includes a system on chip (SoC) in which a plurality of integrated circuits including a processor core and a microcomputer are integrated on a single chip;

a power management integrated circuit (IC) for performing power management on the plurality of semiconductor chips;

a plurality of shunt resistors each of which is mounted in series on a different one of power wires connecting the power management IC and the plurality of semiconductor chips;

two output terminals; and

a single selector that outputs voltages at both ends of a shunt resistor to an outside via the two output terminals, the shunt resistor being selected from among the plurality of shunt resistors,

wherein the power management IC, the plurality of semiconductor chips, the plurality of shunt resistors, and the single selector are mounted inside a single package.

2. The semiconductor package according to claim 1 ,

wherein the single selector outputs a voltage difference between the both ends of the shunt resistor selected and a voltage on a power management IC side to the outside via the two output terminals, the voltage on the power management IC side being, among the voltages at the both ends of the shunt resistor, a voltage of the power management IC that is supplied to a power wire on which the shunt resistor selected is mounted.

3. The semiconductor package according to claim 2 , comprising:

a subtracting circuit that is mounted between the single selector and a first output terminal to which the voltage difference is outputted, the first output terminal being one of the two output terminals,

wherein the single selector:

outputs the voltage on the power management IC side to a second output terminal that is a remaining one of the two output terminals and is different from the first output terminal; and

outputs the voltage difference to the first output terminal by outputting, to the subtracting circuit, a voltage on a semiconductor chip side among the voltages at the both ends of the shunt resistor selected, and

the subtracting circuit calculates the voltage difference by subtracting the voltage on the semiconductor chip side from the voltage on the power management IC side.

4. The semiconductor package according to claim 1 ,

wherein the single selector outputs, to the outside via the two output terminals, a voltage on a power management IC side and a voltage obtained by amplifying a voltage difference between the both ends of the shunt resistor selected, the voltage on the power management IC side being, among the voltages at the both ends of the shunt resistor, a voltage of the power management IC that is supplied to a power wire on which the shunt resistor selected is mounted.

5. The semiconductor package according to claim 4 , comprising:

a subtracting circuit and an amplifier circuit that are mounted between the single selector and a first output terminal to which the voltage obtained by amplifying the voltage difference is outputted, the first output terminal being one of the two output terminals,

wherein the single selector:

outputs the voltage on the power management IC side to a second output terminal that is a remaining one of the two output terminals and is different from the first output terminal; and

outputs the voltage obtained by amplifying the voltage difference by outputting, to the subtracting circuit, a voltage on a semiconductor chip side among the voltages at the both ends of the shunt resistor selected,

the subtracting circuit calculates the voltage difference by subtracting the voltage on the semiconductor chip side from the voltage on the power management IC side, and

the amplifier circuit amplifies the voltage difference calculated by the subtracting circuit, and outputs the voltage difference amplified to the first output terminal.

6. The semiconductor package according to claim 1 ,

wherein the plurality of semiconductor chips include a dynamic random-access memory (DRAM).

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2024
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.
Reel/Frame 066709/0752 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2023
From: TANAKA, KAZUHITO
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 064380/0810 →
Priority Claims (1)
JP 2022-018028 · Feb 8, 2022 · national
Continuity (1)
Related Publication 20230253382A1 · Aug 10, 2023
References Cited (3)
US 6262902B1 · Watanabe et al. · 2001 [cited by applicant]
US 20170303400A1 · Frenette · 2017 [cited by examiner]
JP 2000174202A · 2000 [cited by applicant]