Technologies for filtering memory access transactions received from one or more I/O devices
Technologies for secure I/O include a compute device having a processor, a memory, an input/output (I/O) device, and a filter logic. The filter logic is configured to receive a first key identifier from the processor, wherein the first key identifier is indicative of a shared memory range includes a shared key identifier range to be used for untrusted I/O devices and receive a transaction from the I/O device, wherein the transaction includes a second key identifier and a trust device ID indicator associated with the I/O device. The filter logic is further configured to determine whether the transaction is asserted with the trust device ID indicator indicative of whether the I/O device is assigned to a trust domain and determine, in response to a determination that the transaction is not asserted with the trust device ID indicator, whether the second key identifier matches the first key identifier.
1. An apparatus comprising:
a processor; and
a filter circuitry to:
determine whether a transaction from an input/output (I/O) device is asserted with a trust device identifier indicator indicative that the I/O device is assigned to a trust domain;
allow the I/O device to access memory within the trust domain when the transaction is asserted with the trust device identifier indicator, including to store a private key identifier of the trust domain in a plurality of upper bits of an address of the transaction, wherein the private key identifier is to identify a private key of the trust domain, wherein contents of the memory within the trust domain are to be encrypted with a key that is not accessible to a virtual machine monitor (VMM); and
not allow the I/O device to access the memory within the trust domain when the transaction is not asserted with the trust device identifier indicator.
2. The apparatus of claim 1 , wherein the filter circuitry, when the transaction is asserted with the trust device identifier indicator, is to replace a first key identifier with a in the plurality of upper bits with the private key identifier.
3. The apparatus of claim 2 , wherein the filter circuitry is to receive the private key identifier from the trust domain.
4. The apparatus of claim 1 , wherein, when the transaction is not asserted with the trust device identifier indicator, the filter circuitry is to determine whether a first key identifier asserted with the transaction matches a shared key identifier or is within a shared key identifier range, the shared key identifier or the shared key identifier range corresponding to shared memory to be used for untrusted I/O.
5. The apparatus of claim 4 , wherein the filter circuitry, when the first key identifier matches the shared key identifier or is within the shared key identifier range, is to allow the I/O device to access memory outside of the trust domain.
6. The apparatus of claim 5 , wherein the filter circuitry, when the first key identifier does not match the shared key identifier or is not within the shared key identifier range, is to block the transaction.
7. The apparatus of claim 6 , wherein the filter circuitry, when the first key identifier does not match the shared key identifier or is not within the shared key identifier range, is to cause a warning to be provided.
8. The apparatus of claim 4 , wherein the filter circuitry is to receive the shared key identifier or the shared key identifier range from the processor.
9. The apparatus of claim 1 , wherein the transaction is a direct memory access (DMA) transaction.
10. The apparatus of claim 1 , wherein the filter circuitry is coupled between the processor and the I/O device.
11. The apparatus of claim 1 , wherein the filter circuitry is included in the I/O device.
12. A method comprising:
receiving a transaction from an input/output (I/O) device at a filter circuitry within one of an IOMMU and a root complex;
determining, by the filter circuitry, whether the transaction is asserted with a trust device identifier indicator indicative that the I/O device is assigned to a trust domain;
allowing, by the filter circuitry, the I/O device to access memory within the trust domain when the transaction is asserted with the trust device identifier indicator, including replacing a first key identifier in a plurality of upper bits of an address of the transaction with a private key identifier that identifies a private key of the trust domain, wherein contents of the memory within the trust domain are encrypted with a key not known to a virtual machine monitor (VMM); and
not allowing the I/O device to access the memory within the trust domain when the transaction is not asserted with the trust device identifier indicator.
13. The method of claim 12 , further comprising replacing a first key identifier in the plurality of upper bits with the private key identifier when the transaction is asserted with the trust device identifier indicator.
14. The method of claim 12 , further comprising determining whether a first key identifier asserted with the transaction matches a shared key identifier or is within a shared key identifier range when the transaction is not asserted with the trust device identifier indicator, the shared key identifier or the shared key identifier range corresponding to shared memory used for untrusted I/O.
15. The method of claim 14 , further comprising:
allowing the I/O device to access memory outside of the trust domain when the first key identifier matches the shared key identifier or is within the shared key identifier range; and
blocking the transaction when the first key identifier does not match the shared key identifier or is not within the shared key identifier range.
16. A system comprising:
a system memory;
a processor coupled with the system memory;
an input/output (I/O) device; and
a filter circuitry coupled with the processor and coupled with the I/O device, the filter circuitry to:
determine whether a transaction from the I/O device is asserted with a trust device identifier indicator indicative that the I/O device is assigned to a trust domain;
allow the I/O device to access memory within the trust domain when the transaction is asserted with the trust device identifier indicator, including to store a private key identifier of the trust domain in a plurality of upper bits of an address of the transaction, wherein the private key identifier is to identify a private key of the trust domain, wherein contents of the memory within the trust domain are to be encrypted with a key that a virtual machine monitor (VMM) cannot access; and
not allow the I/O device to access the memory within the trust domain when the transaction is not asserted with the trust device identifier indicator.
17. The system of claim 16 , wherein the filter circuitry, when the transaction is asserted with the trust device identifier indicator, is to replace a first key identifier in the plurality of upper bits with the private key identifier.
18. The system of claim 16 , wherein, when the transaction is not asserted with the trust device identifier indicator, the filter circuitry is to determine whether a first key identifier asserted with the transaction matches a shared key identifier or is within a shared key identifier range, the shared key identifier or the shared key identifier range corresponding to shared memory to be used for untrusted I/O, wherein the filter circuitry, when the first key identifier matches the shared key identifier or is within the shared key identifier range, is to allow the I/O device to access memory outside of the trust domain.
19. The system of claim 18 , wherein the filter circuitry, when the first key identifier does not match the shared key identifier or is not within the shared key identifier range, is to block the transaction.