IP Library Granted Patent US 12,431,850
Granted Patent B2
US 12,431,850 · App. 17/894,294 · Granted Sep 30, 2025

Differential driver having input signal-controlled common-mode reference

Inventor: Vamsikrishna Parupalli (Austin, TX)
Assignee: CIRRUS LOGIC, INC.
H03F3/4565H03F3/45183H03F3/45475
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,431,850
App. No.
17/894,294
Granted
Sep 30, 2025
Kind
B2
Abstract

A differential amplifier provides improved signal swing and reduced common-mode output noise. The differential amplifier circuit includes a driver circuit with a first output for driving a first output of the differential amplifier and with a second output for driving a second output of the differential amplifier. The driver circuit has inputs for receiving a differential (complementary) pair of input signals at least one common-mode reference input for receiving a common-mode reference signal. The differential amplifier also includes a signal maxima detector having inputs for receiving the differential input signals that detects a maximum value between the individual signals, including any input common-mode voltage. The differential amplifier also includes a common-mode reference circuit that provides the common-mode reference signal and an input coupled to an output of the signal maxima detector, so that a common-mode voltage of the outputs is independent of power supply voltages provided to the driver circuit.

Claims (43)

1. A differential amplifier circuit, comprising:

a driver circuit having a first output for driving a first output of the differential amplifier and a second output for driving a second output of the differential amplifier, wherein the driver circuit has a first input for receiving a first drive signal, a second input for receiving a second drive signal and at least one common-mode reference input for receiving a common-mode reference signal, wherein the second output is a complementary output to the first output of the driver circuit;

a signal maxima detector having a differential input for receiving the first drive signal and the second drive signal, wherein the maxima detector detects a maximum value of the first drive signal and the second drive signal including any common-mode voltage of the first drive signal and the second drive signal; and

a common-mode reference circuit having an output for providing the common-mode reference signal and an input coupled to an output of the signal maxima detector, whereby a common-mode voltage of the first output of the differential amplifier and the second output of the differential amplifier are independent of one or more power supply voltages provided to the driver circuit.

2. The differential amplifier circuit of claim 1 , wherein the driver circuit comprises:

a first amplifier circuit having a first amplifier output for driving the first output of the differential amplifier, a first input for receiving a first drive signal and a second input for receiving a common-mode reference signal; and

a second amplifier circuit having a second amplifier output for driving the second output of the differential amplifier, a third input for receiving a second drive signal and a fourth input for receiving the common-mode reference signal.

3. The differential amplifier circuit of claim 1 , wherein the driver circuit comprises a single amplifier circuit having a differential amplifier input for receiving the first drive signal and the second drive signal as a differential pair and a common mode input for receiving the common-mode reference signal.

4. The differential amplifier circuit of claim 1 , wherein the common-mode reference circuit adds an offset to the output of the signal maxima detector to provide additional signal swing range at the outputs of the differential amplifier.

5. The differential amplifier of claim 1 , wherein the signal maxima detector comprises an analog winner-take-all (WTA) circuit.

6. The differential amplifier of claim 5 , wherein the WTA circuit comprises:

a first voltage follower circuit having an input coupled to the first drive signal; and

a second voltage follower circuit having an input coupled to the second drive signal, and wherein an output of the first voltage follower circuit and an output of the second voltage follower circuit are coupled together to provide the output of the signal maxima detector, whereby a voltage of the output of the signal maxima detector follows a greater one of a voltage of the first drive signal and the second drive signal.

7. The differential amplifier of claim 1 , wherein the signal maxima detector comprises a low-offset rectifier circuit having an offset determined by the common-mode reference signal, a first input for receiving the first drive signal, and a second input for receiving the second drive signal, wherein the low-offset rectifier circuit generates an output according to a maximum value as between the first drive signal and the second drive signal.

8. A system for providing a power output to a load, comprising:

an output stage for supplying the current to the load, the output stage having a first push-pull driver coupled to a first output for coupling to a first terminal of the load and a second push-pull driver coupled to a second output for coupling to a second terminal of the load;

a mode selection control circuit for selecting between a pulse-width modulated mode and a linear mode of the system;

a pulse-width modulator output driver for providing pulse-width modulated drive signals to an input of the output stage when the mode selection control circuit selects the pulse-width modulated mode; and

a linear amplifier stage for providing a linear analog signal to the input of the output stage when the mode selection control circuit selects the linear mode, wherein both the first push-pull driver and the second push-pull driver are operated to supply the current to the load when the mode selection control circuit selects the linear mode, wherein the linear amplifier stage comprises a driver circuit having a first output for driving a first output of the differential amplifier, a second output for driving a second output of the differential amplifier, a first input for receiving a first drive signal, a second input for receiving a second drive signal, and at least one third input for receiving a common-mode reference signal, and wherein the second output is a complementary output to the first output of the driver circuit, wherein the linear amplifier stage further comprises a signal maxima detector having a differential input for receiving the first drive signal and the second drive signal, wherein the maxima detector detects a maximum value of the first drive signal and the second drive signal including any common-mode voltage of the first drive signal and the second drive signal, and wherein the linear amplifier stage comprises a common-mode reference circuit having an output for providing the common-mode reference signal and an input coupled to an output of the signal maxima detector, whereby a common-mode voltage of the first output of the driver circuit and the second output of the driver circuit are independent of one or more power supply voltages provided to the driver circuit.

9. The system of claim 8 , wherein the load is a motor, wherein the output stage supplies current to the motor, and wherein the system further comprises a feedback control loop for sensing the current supplied to the motor and providing a first output to the pulse-width modulator and a second output to the linear amplifier stage.

10. The system of claim 8 , wherein the first drive signal and the second drive signal are complementary differential outputs of a proportional integral-derivative (PID) control block that compensates for a motor current phase difference caused by the inductive load of the motor.

11. The system of claim 8 , wherein when the mode selection circuit selects the linear mode, the first push-pull driver and the second push-pull driver are operated as class-AB linear drivers.

12. A method of generating a differential output drive signal, comprising:

receiving a differential drive signal having an input common-mode voltage and composed of a first drive signal and a second complementary drive signal;

generating a common-mode reference by detecting an instant maximum voltage of the first drive signal and the second complementary drive signal and generating a time-varying common-mode reference signal from the detected instant maximum voltage; and

driving a first output of a driver circuit of a differential amplifier with the first drive signal and a second output of the driver circuit with the second drive signal, wherein the first output and second output have a common-mode voltage controlled by the common-mode reference signal and differential outputs controlled by the first drive signal and the second drive signal, whereby a common-mode voltage of the first output of the driver circuit and the second output of the driver circuit are independent of one or more power supply voltages provided to the driver circuit.

13. The method of claim 12 , wherein the driving is performed by a driver circuit comprising:

a first amplifier circuit having a first amplifier output for driving the first output of the differential amplifier, a first input for receiving a first drive signal and a second input for receiving a common-mode reference signal; and

a second amplifier circuit having a second amplifier output for driving the second output of the differential amplifier, a third input for receiving a second drive signal and a fourth input for receiving the common-mode reference signal.

14. The method of claim 12 , wherein the driving is performed by a driver circuit comprising a single amplifier circuit having a differential input for receiving the first and second drive signal as a differential pair and a common mode input for receiving the common-mode reference signal.

15. The method of claim 12 , further comprising adding an offset to the output of the signal maxima detector to provide additional signal swing range at the outputs of the differential amplifier.

16. The method of claim 12 , wherein the detecting an instant maximum voltage is performed by an analog winner-take-all (WTA) circuit.

17. The method of claim 16 , wherein the WTA circuit comprises:

a first voltage follower circuit having an input coupled to the first drive signal; and

a second voltage follower circuit having an input coupled to the second drive signal, and wherein an output of the first voltage follower circuit and an output of the second voltage follower circuit are coupled together to provide the output of the signal maxima detector, whereby a voltage of the output of the signal maxima detector follows a greater one of a voltage of the first drive signal and the second drive signal.

18. The method of claim 12 , wherein the signal maxima detector comprises a low-offset rectifier circuit having an offset determined by the common-mode reference signal, a first input for receiving the first drive signal, and a second input for receiving the second drive signal, wherein the low-offset rectifier circuit generates an output according to a maximum value as between the first drive signal and the second drive signal.

19. The method of claim 12 , wherein the method is a method of operation of a linear signal path of a system having a selectable pulse-width modulated or linear drive for supplying power to a load, and wherein the method further comprises:

selecting between a pulse-width modulated mode and a linear mode of the system;

responsive to selection of the pulse-width modulated mode, providing pulse-width modulated drive signals to the driver circuit from a pulse-width modulator; and

responsive to selection of the linear mode, providing the first drive signal and the second complementary drive signal to the driver circuit.

20. The method of claim 19 , wherein the load is a motor, wherein the driver circuit supplies current to the motor, and wherein the system further comprises a feedback control loop for sensing the current supplied to the motor and providing a first output to the pulse-width modulator and a second output to a linear amplifier stage that provides the differential drive signal received by the receiving.

21. The method of claim 19 , wherein the first drive signal and the second drive signal are complementary differential outputs of a proportional integral-derivative (PID) control block that compensates for a motor current phase difference caused by the inductive load of the motor.

22. The method of claim 19 , wherein, in response to the selecting having selected the linear mode, the driver circuit is operated as class-AB linear driver.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2025
From: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
To: CIRRUS LOGIC, INC.
Reel/Frame 072162/0188 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2022
From: PARUPALLI, VAMSIKRISHNA
To: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Reel/Frame 062110/0890 →
Continuity (1)
Related Publication 20240072747A1 · Feb 29, 2024
References Cited (43)
US 5550450A · Palko et al. · 1996 [cited by applicant]
US 6995537B1 · Plutowski et al. · 2006 [cited by applicant]
US 7053806B1 · Rao et al. · 2006 [cited by applicant]
US 7227390B1 · Bapat et al. · 2007 [cited by applicant]
US 7463089B1 · Bapat et al. · 2008 [cited by applicant]
US 7579910B2 · Zhang et al. · 2009 [cited by applicant]
US 8115366B2 · Hoffman et al. · 2012 [cited by applicant]
US 8139792B2 · Magrath · 2012 [cited by applicant]
US 8803569B1 · Malladi et al. · 2014 [cited by applicant]
US 9219414B2 · Shao · 2015 [cited by applicant]
US 9319033B1 · Jin et al. · 2016 [cited by applicant]
US 9735574B2 · Tournatory et al. · 2017 [cited by applicant]
US 9929664B2 · King et al. · 2018 [cited by applicant]
US 9960741B2 · Mengad et al. · 2018 [cited by applicant]
US 9973156B2 · King et al. · 2018 [cited by applicant]
US 10034085B2 · Cho et al. · 2018 [cited by applicant]
US 10298188B2 · Kiyono · 2019 [cited by applicant]
US 10439539B2 · Lopez et al. · 2019 [cited by applicant]
US 10547267B2 · Li et al. · 2020 [cited by applicant]
US 10734981B1 · Zanbaghi et al. · 2020 [cited by applicant]
US 10996634B2 · Yao et al. · 2021 [cited by applicant]
US 11037596B2 · Miura · 2021 [cited by applicant]
US 11070177B2 · Singh et al. · 2021 [cited by applicant]
US 11115046B2 · Parupalli et al. · 2021 [cited by applicant]
US 11190136B2 · Yuan et al. · 2021 [cited by applicant]
US 11290070B2 · Zanbaghi et al. · 2022 [cited by applicant]
US 11309853B1 · Peterson et al. · 2022 [cited by applicant]
US 11329617B1 · Peterson et al. · 2022 [cited by applicant]
US 20030006749A1 · Rollman · 2003 [cited by applicant]
US 20070229159A1 · Krishnan et al. · 2007 [cited by applicant]
US 20080246455A1 · Chu et al. · 2008 [cited by applicant]
US 20090201083A1 · Guanziroli et al. · 2009 [cited by applicant]
US 20120013321A1 · Huang et al. · 2012 [cited by applicant]
US 20130136278A1 · Quilter · 2013 [cited by applicant]
US 20130173980A1 · Xi · 2013 [cited by applicant]
US 20160182998A1 · Galal et al. · 2016 [cited by applicant]
US 20180115250A1 · Ng et al. · 2018 [cited by applicant]
US 20180331624A1 · Pullen et al. · 2018 [cited by applicant]
US 20220158597A1 · Zanbaghi et al. · 2022 [cited by applicant]
US 20220247367A1 · Melanson et al. · 2022 [cited by applicant]
US 20220337181A1 · Parupalli et al. · 2022 [cited by applicant]
Ramirez-Angulo, et al.,“A High-Swing, High-Speed CMOS WTA Using Differential Flipped Voltage Followers”, IEEE Transactions On Circuits and Systems, vol. 54, No. 8, Aug. 2007, Piscataway, NJ, pp. 668-672 (pp. 1-5 in pdf). [cited by applicant]
Prommee, et al., “CMOS WTA maximum and minimum circuits with their applications to analog switch and rectifiers”, Microelectronics Journal 42, 2011, Netherlands, pp. 52-62 (pp. 1-11 in pdf). [cited by applicant]