IP Library Granted Patent US 12,436,818
Granted Patent B2
US 12,436,818 · App. 17/821,832 · Granted Oct 7, 2025

Disabling a processor facility on a new processor generation without breaking binary compatibility

Inventors: Brian Frank Veale (Cedar Park, TX); Arnold Flores (Round Rock, TX); Andre Laurent Albot (Austin, TX); Juan M. Casas, Jr. (Round Rock, TX)
Assignee: International Business Machines Corporation
G06F9/5077G06F9/5088
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Quick Facts
Patent No.
US 12,436,818
App. No.
17/821,832
Granted
Oct 7, 2025
Kind
B2
Abstract

Method, computer program product, and computer system are provided. A first migration of a running logical partition (LPAR) is performed from a first-generation computer to a second-generation computer. Availability of a facility differs between the first- and second-generation computers. Upon completion of the first migration, an operating system of the running LPAR detects whether a required facility in use on the first-generation computer is available on the second-generation computer. Operating system takes an action to continue an orderly execution of the LPAR, the operating system, and threads of an application in the LPAR depending on the availability of the required facility. A second migration is performed of the running LPAR from the second-generation computer back to the first-generation computer. The required facility is available on the first-generation computer. The operating system restores access to threads of the application to the required facility.

Claims (40)

1. A method comprising:

performing a first migration of a first running logical partition (LPAR) from a first-generation computer to a second-generation computer, where an availability of a facility differs between the first-generation computer and the second-generation computer, and wherein an operating system of the first running LPAR is actively executing the facility during the first migration;

upon completion of the first migration, the operating system of the first running LPAR detecting whether a required facility in use on the first-generation computer is available on the second-generation computer; and

based on the required facility being available on the second-generation computer, the operating system continuing execution of the first running LPAR;

based on the required facility not being available on the second-generation computer, the operating system continuing execution of the required facility in emulation mode until work requiring the required facility completes, after which the operating system intercepts attempts to execute the required facility, signals an illegal operation to a calling process; and

terminating the calling process in response to the calling process not executing a signal handler.

2. The method of claim 1 , comprising:

performing a second migration of a first running LPAR from the second-generation computer back to the first-generation computer, wherein the required facility is available on the first-generation computer, and wherein the operating system restores access to threads of an application to the required facility.

3. The method of claim 1 , wherein the required facility includes a processor facility having an availability control, wherein software is required to provide a fail-over path when instructions associated with executing the processor facility report a failure.

4. The method of claim 1 , wherein following a completed migration, the operating system issues an unavailable interrupt to threads that are executing transactional memory instructions but are not in a transaction when the migrating occurs, and wherein the operating system resumes the threads at a software failure handler.

5. The method of claim 1 , wherein following a completed migration, for threads of an application that are in a transaction and are suspended by the operating system, the operating system emulates transaction mode to allow the completion of the transaction's suspended section, and wherein following the completion of the transaction's suspended section, the operating system issues a persistent failure to the threads.

6. The method of claim 1 , wherein following a completed migration, the operating system issues an unavailable interrupt to threads that attempt to begin a transaction, and wherein the operating system terminates the threads.

7. The method of claim 1 wherein upon migrating the first running LPAR from the second-generation computer where the required facility is not available to the first-generation computer having the required facility, the operating system dynamically enables the required facility to threads of an application.

8. A computer program product, the computer program product comprising a non-transitory tangible storage device having program code embodied therewith, the program code executable by a processor of a computer to perform a method, the method comprising:

performing a first migration of a first running logical partition (LPAR) from a first-generation computer to a second-generation computer, where an availability of a facility differs between the first-generation computer and the second-generation computer, and wherein an operating system of the first running LPAR is actively executing the facility during the first migration;

upon completion of the first migration, the operating system of the first running LPAR detecting whether a required facility in use on the first-generation computer is available on the second-generation computer; and

based on the required facility being available on the second-generation computer, the operating system continuing execution of the first running LPAR;

based on the required facility not being available on the second-generation computer, the operating system continuing execution of the required facility in emulation mode until work requiring the required facility completes, after which the operating system intercepts attempts to execute the required facility, signals an illegal operation to a calling process; and

terminating the calling process in response to the calling process not executing a signal handler.

9. The computer program product of claim 8 , comprising: performing a second migration of a first running LPAR from the second-generation computer back to the first-generation computer, wherein the required facility is available on the first-generation computer, and wherein the operating system restores access to threads of an application to the required facility.

10. The computer program product of claim 8 , wherein the required facility includes a processor facility having an availability control, wherein software is required to provide a fail-over path when instructions associated with executing the processor facility report a failure.

11. The computer program product of claim 8 , wherein following a completed migration, the operating system issues an unavailable interrupt to threads that are executing transactional memory instructions but are not in a transaction when the migrating occurs, and wherein the operating system resumes the threads at a software failure handler.

12. The computer program product of claim 8 , wherein following a completed migration, for threads that are in a transaction and are suspended by the operating system, the operating system emulates transaction mode to allow the completion of the transaction's suspended section, and wherein following the completion of the transaction's suspended section, the operating system issues a persistent failure to the threads.

13. The computer program product of claim 8 , wherein following a completed migration, the operating system issues an unavailable interrupt to threads that attempt to begin a transaction, and wherein the operating system terminates the threads.

14. The computer program product of claim 8 wherein upon migrating the first running LPAR from the second-generation computer where the required facility is not available to the first-generation computer having the required facility, the operating system dynamically enables the required facility to threads.

15. A computer system, comprising:

one or more processors;

a memory coupled to at least one of the processors;

a set of computer program instructions stored in the memory and executed by at least one of the processors in order to perform actions of:

performing a first migration of a first running logical partition (LPAR) from a first-generation computer to a second-generation computer, where an availability of a facility differs between the first-generation computer and the second-generation computer, and wherein an operating system of the first running LPAR is actively executing the facility during the first migration;

upon completion of the first migration, the operating system of the first running LPAR detecting whether a required facility in use on the first-generation computer is available on the second-generation computer; and

based on the required facility being available on the second-generation computer, the operating system continuing execution of the first running LPAR;

based on the required facility not being available on the second-generation computer, the operating system continuing execution of the required facility in emulation mode until work requiring the required facility completes, after which the operating system intercepts attempts to execute the required facility, signals an illegal operation to a calling process; and

terminating the calling process in response to the calling process not executing a signal handler.

16. The computer system of claim 15 , comprising:

performing a second migration of a first running LPAR from the second-generation computer back to the first-generation computer, wherein the required facility is available on the first-generation computer, and wherein the operating system restores access to threads of an application to the required facility.

17. The computer system of claim 15 , wherein the required facility includes a processor facility having an availability control, wherein software is required to provide a fail-over path when instructions associated with executing the processor facility report a failure.

18. The computer system of claim 15 , wherein following a completed migration, the operating system issues an unavailable interrupt to threads that are executing transactional memory instructions but are not in a transaction when the migrating occurs, and wherein the operating system resumes the threads at a software failure handler.

19. The computer system of claim 15 , wherein following a completed migration, for threads that are in a transaction and are suspended by the operating system, the operating system emulates transaction mode to allow the completion of the transaction's suspended section, and wherein following the completion of the transaction's suspended section, the operating system issues a persistent failure to the threads.

20. The computer system of claim 15 , wherein following a completed migration, the operating system issues an unavailable interrupt to threads that attempt to begin a transaction, and wherein the operating system terminates the threads.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2022
From: VEALE, BRIAN FRANK; FLORES, ARNOLD; ALBOT, ANDRE LAURENT; CASAS, JUAN M., JR.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 060881/0238 →
Continuity (1)
Related Publication 20240069980A1 · Feb 29, 2024
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