Granted Patent B2

US 12,439,031 · App. 18/489,678 · Granted Oct 7, 2025

Inventors: Kiyofumi Abe (Osaka, JP); Takahiro Nishi (Nara, JP); Tadamasa Toma (Osaka, JP); Ryuichi Kanoh (Osaka, JP)

Assignee: Panasonic Intellectual Property Corporation of America

H04N19/105H04N19/119H04N19/139H04N19/14H04N19/176H04N19/52H04N19/573

Abstract

Claims (41)

1. A decoder comprising:

circuitry; and

memory,

wherein, using the memory, the circuitry:

in a first operating mode,

derives first motion vectors for a first block obtained by splitting a picture, using a first inter prediction scheme, and

generates a prediction image corresponding to the first block, by referring to spatial gradients of luminance generated based on the first motion vectors; and

in a second operating mode,

derives second motion vectors for a sub-block obtained by splitting a second block, using a second inter prediction scheme different from the first inter prediction scheme, the second block being obtained by splitting the picture, and

generates a prediction image corresponding to the sub-block without referring to spatial gradients of luminance.

2. An encoder comprising:

circuitry; and

memory,

wherein, using the memory, the circuitry:

in a first operating mode,

derives first motion vectors for a first block obtained by splitting a picture, using a first inter prediction scheme, and

generates a prediction image corresponding to the first block, by referring to spatial gradients of luminance generated based on the first motion vectors;

in a second operating mode,

derives second motion vectors for a sub-block obtained by splitting a second block, using a second inter prediction scheme different from the first inter prediction scheme, the second block being obtained by splitting the picture, and

generates a prediction image corresponding to the sub-block without referring to spatial gradients of luminance; and

generates a bitstream including information for deriving the first motion vectors or the second motion vectors.

3. A bitstream generation device comprising:

circuitry; and

memory,

wherein, using the memory, the circuitry:

in a first operating mode,

derives first motion vectors for a first block obtained by splitting a picture, using a first inter prediction scheme, and

generates a prediction image corresponding to the first block, by referring to spatial gradients of luminance generated based on the first motion vectors;

in a second operating mode,

derives second motion vectors for a sub-block obtained by splitting a second block, using a second inter prediction scheme different from the first inter prediction scheme, the second block being obtained by splitting the picture, and

generates a prediction image corresponding to the sub-block without referring to spatial gradients of luminance; and

generates a bitstream including information for deriving the first motion vectors or the second motion vectors.

4. A method of transmitting a bitstream comprising:

in a first operating mode,

deriving first motion vectors for a first block obtained by splitting a picture, using a first inter prediction scheme, and

generating a prediction image corresponding to the first block, by referring to spatial gradients of luminance generated based on the first motion vectors;

in a second operating mode,

deriving second motion vectors for a sub-block obtained by splitting a second block, using a second inter prediction scheme different from the first inter prediction scheme, the second block being obtained by splitting the picture, and

generating a prediction image corresponding to the sub-block without referring to spatial gradients of luminance;

generating the bitstream including information for deriving the first motion vectors or the second motion vectors; and

transmitting the bitstream.

Continuity (6)

References Cited (15)