Bandgap reference circuit
Embodiments include herein are directed towards a circuit having a core bandgap reference circuit including a first transistor, a second transistor, and a differential amplifier. The circuit may further include a cascoded bandgap reference circuit in electrical communication with the core bandgap reference circuit, wherein the cascoded bandgap reference circuit includes a first supply noise path that includes a plurality of transistors that are electrically connected and a flipped voltage follower configuration that reduces an impedance at a transistor associated with a second supply noise path.
1 . A circuit comprising:
a core bandgap reference circuit including a first transistor, a second transistor, and a differential amplifier; and
a cascoded bandgap reference circuit in electrical communication with the core bandgap reference circuit, wherein the cascoded bandgap reference circuit includes a first supply noise path that includes a first plurality of transistors that are electrically connected and a flipped voltage follower configuration that reduces an impedance at a transistor associated with a second supply noise path, wherein the first plurality of transistors includes a third transistor, a fourth transistor, and a fifth transistor, wherein the transistor associated with the second supply noise path is connected to a node of the first supply noise path, and wherein the node is located between the fourth transistor and the fifth transistor.
2 . The circuit of claim 1 , wherein the second supply noise path includes a second plurality of transistors.
3 . The circuit of claim 1 , wherein the first transistor and the second transistor of the core bandgap reference circuit are in electrical communication with the first and second supply noise paths.
4 . A method comprising:
providing a core bandgap reference circuit including a first transistor, a second transistor, and a differential amplifier; and
transmitting a signal from the core bandgap reference circuit to a cascoded bandgap reference circuit that is in electrical communication with the core bandgap reference circuit, wherein the cascoded bandgap reference circuit includes a first supply noise path that includes a first plurality of transistors that are electrically connected and a flipped voltage follower configuration that reduces an impedance at a transistor associated with a second supply noise path, wherein the first plurality of transistors includes a third transistor, a fourth transistor, and a fifth transistor, wherein the transistor associated with the second supply noise path is connected to a node of the first supply noise path, and wherein the node is located between the fourth transistor and the fifth transistor.
5 . The method of claim 4 , wherein the second supply noise path includes a second plurality of transistors.
6 . The method of claim 4 , wherein the first transistor and the second transistor of the core bandgap reference method are in electrical communication with the first and second supply noise paths.
7 . A system comprising:
a voltage generator including a core bandgap reference circuit including a first transistor, a second transistor, and a differential amplifier, the voltage generator further including a cascoded bandgap reference circuit in electrical communication with the core bandgap reference circuit, wherein the cascoded bandgap reference circuit includes a first supply noise path that includes a first plurality of transistors that are electrically connected and a flipped voltage follower configuration that reduces an impedance at a transistor associated with a second supply noise path, wherein the first plurality of transistors includes a third transistor, a fourth transistor, and a fifth transistor, wherein the transistor associated with the second supply noise path is connected to a node of the first supply noise path, and wherein the node is located between the fourth transistor and the fifth transistor;
an analog to digital converter configured to receive an output from the voltage generator;
a digital to analog converter configured to receive an output from the analog to digital converter; and
a second differential amplifier configured to receive an output from the digital to analog converter.
8 . The system of claim 7 , wherein the second supply noise path includes a second plurality of transistors.