Read level calibration with information collection skipping
Various embodiments provide for performing a read voltage level calibration process with selective skipping collection of calibration-related information on a memory device of a memory system, such as a memory sub-system. For example, some embodiments provide for performing a coarse threshold estimate (CTE) calibration process, with selective skipping of failed bit count (CFBit) information collection, on a memory system.
1 . A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, configured to perform operations comprising:
performing a non-skip iteration of a read voltage level calibration process on a select page of a select block of the memory device, the non-skip iteration comprising:
performing, on at least a portion of the select page, a non-skip coarse threshold estimate read to generate current calibration-related information for a plurality of read voltage levels associated with the select page, the plurality of read voltage levels representing all read voltage levels associated with the select page;
based on the current calibration-related information, determining whether at least one read voltage level in the plurality of read voltage levels need calibration; and
in response to determining that a set of read voltage levels from the plurality of read voltage levels needs calibration and that the set of read voltage levels is less than all of the plurality of read voltage levels, performing a skip iteration of the read voltage level calibration process that comprises:
attempting to calibrate the set of read voltage levels by adjusting a set of read voltage level offsets that corresponds to the set of read voltage levels; and
performing, on at least the portion of the select page, a read-level-skip coarse threshold estimate read to generate subsequent calibration-related information for the set of read voltage levels while skipping generation of calibration-related information for any other read voltage level.
2 . The system of claim 1 , wherein the non-skip iteration comprises:
in response to determining that all read voltage levels in the plurality of read voltage levels need calibration:
attempting to calibrate the plurality of read voltage levels by adjusting a plurality of read voltage level offsets that corresponds to the plurality of read voltage levels; and
reperforming the non-skip iteration of the calibration process.
3 . The system of claim 1 , wherein the set of read voltage levels is a first set of read voltage levels, wherein the subsequent calibration-related information is first calibration-related information, wherein the set of read voltage level offsets is a first set of read voltage level offsets for the first set of read voltage levels, and wherein the skip iteration is a first skip iteration, and wherein the first skip iteration comprises:
based on the subsequent calibration-related information, determining whether at least one read voltage level in the first set of read voltage levels need calibration; and
in response to determining that a second set of read voltage levels from the first set of read voltage levels needs calibration:
attempting to calibrate the second set of read voltage levels by adjusting a second set of read voltage level offsets that corresponds to the second set of read voltage levels; and
performing a second skip iteration of the read voltage level calibration process that performs the read-level-skip coarse threshold estimate read to generate second calibration-related information for the second set of read voltage levels while skipping generation of failed bit count information for any other read voltage level.
4 . The system of claim 3 , wherein the first skip iteration comprises:
in response to determining that no read voltage level in the first set of read voltage levels needs calibration, ending the read voltage level calibration process.
5 . The system of claim 1 , wherein the read-level-skip coarse threshold estimate read comprises a coarse threshold estimate read configured to receive a parameter, the parameter selecting one or more read voltage levels for which the coarse threshold estimate read generates calibration-related information.
6 . The system of claim 5 , wherein the parameter comprises a three-bit parameter for selecting one or more read voltage levels voltages associated with one of a lower page (LP), an upper page (UP), or an extra page (XP) of a triple-level cell (TLC) block of the memory device.
7 . The system of claim 5 , wherein the parameter comprises a four-bit parameter for selecting one or more read voltage levels voltages associated with one of a lower page (LP), an upper page (UP), an extra page (XP), or a top page (TP) of a quad-level cell (QLC) block of the memory device.
8 . The system of claim 1 , wherein the operations comprise:
detecting a read error during execution of a read operation on the select page; and
in response to detecting the read error, triggering a read error handling process that performs the read voltage level calibration process.
9 . The system of claim 1 , wherein the plurality of read voltage levels is determined based on a page type of the select page.
10 . The system of claim 9 , wherein the page type comprises at least one of a lower page (LP), an upper page (UP), an extra page (XP), or a top page (TP).
11 . The system of claim 1 , wherein the read-level-skip coarse threshold estimate read comprises a failed bit count (CFBit) read configured to receive a parameter that selects one or more read voltage levels for which the CFBit read generates calibration-related information.
12 . The system of claim 1 , wherein the read voltage level calibration process comprises a coarse threshold estimate (CTE) process.
13 . The system of claim 1 , wherein the current calibration-related information comprises failed bit count information.
14 . The system of claim 1 , wherein the subsequent calibration-related information comprises failed bit count information.
15 . At least one non-transitory machine-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
performing a non-skip iteration of a read voltage level calibration process on a select page of a select block of a memory device, the non-skip iteration comprising:
performing, on at least a portion of the select page, a non-skip coarse threshold estimate read to generate current calibration-related information for a plurality of read voltage levels associated with the select page, the plurality of read voltage levels representing all read voltage levels associated with the select page;
based on the current calibration-related information, determining whether at least one read voltage level in the plurality of read voltage levels need calibration; and
in response to determining that a set of read voltage levels from the plurality of read voltage levels needs calibration and that the set of read voltage levels is less than all of the plurality of read voltage levels, performing a skip iteration of the read voltage level calibration process that comprises:
attempting to calibrate the set of read voltage levels by adjusting a set of read voltage level offsets that corresponds to the set of read voltage levels; and
performing, on at least the portion of the select page, a read-level-skip coarse threshold estimate read to generate subsequent calibration-related information for the set of read voltage levels while skipping generation of calibration-related information for any other read voltage level.
16 . The at least one non-transitory machine-readable storage medium of claim 15 , wherein the non-skip iteration comprises:
in response to determining that all read voltage levels in the plurality of read voltage levels need calibration:
attempting to calibrate the plurality of read voltage levels by adjusting a plurality of read voltage level offsets that corresponds to the plurality of read voltage levels; and
reperforming the non-skip iteration of the calibration process.
17 . The at least one non-transitory machine-readable storage medium of claim 15 , wherein the set of read voltage levels is a first set of read voltage levels, wherein the subsequent calibration-related information is first calibration-related information, wherein the set of read voltage level offsets is a first set of read voltage level offsets for the first set of read voltage levels, and wherein the skip iteration is a first skip iteration, and wherein the first skip iteration comprises:
based on the subsequent calibration-related information, determining whether at least one read voltage level in the first set of read voltage levels need calibration; and
in response to determining that a second set of read voltage levels from the first set of read voltage levels needs calibration:
attempting to calibrate the second set of read voltage levels by adjusting a second set of read voltage level offsets that corresponds to the second set of read voltage levels; and
performing a second skip iteration of the read voltage level calibration process that performs the read-level-skip coarse threshold estimate read to generate second calibration-related information for the second set of read voltage levels while skipping generation of failed bit count information for any other read voltage level.
18 . The at least one non-transitory machine-readable storage medium of claim 17 , wherein the first skip iteration comprises:
in response to determining that no read voltage level in the first set of read voltage levels needs calibration, ending the read voltage level calibration process.
19 . The at least one non-transitory machine-readable storage medium of claim 15 , wherein the read-level-skip coarse threshold estimate read comprises a coarse threshold estimate read configured to receive a parameter, the parameter selecting one or more read voltage levels for which the coarse threshold estimate read generates calibration-related information.
20 . A method comprising:
performing, by a processing device, a non-skip iteration of a read voltage level calibration process on a select page of a select block of a memory device, the non-skip iteration comprising:
performing, on at least a portion of the select page, a non-skip coarse threshold estimate read to generate current calibration-related information for a plurality of read voltage levels associated with the select page, the plurality of read voltage levels representing all read voltage levels associated with the select page;
based on the current calibration-related information, determining whether at least one read voltage level in the plurality of read voltage levels need calibration; and
in response to determining that a set of read voltage levels from the plurality of read voltage levels needs calibration and that the set of read voltage levels is less than all of the plurality of read voltage levels, performing a skip iteration of the read voltage level calibration process that comprises:
attempting to calibrate the set of read voltage levels by adjusting a set of read voltage level offsets that corresponds to the set of read voltage levels; and
performing, on at least the portion of the select page, a read-level-skip coarse threshold estimate read to generate subsequent calibration-related information for the set of read voltage levels while skipping generation of calibration-related information for any other read voltage level.