IP Library › Granted Patent US 12,554,656
Granted Patent B2
US 12,554,656 · App. 17/214,778 · Granted Feb 17, 2026

Systems, methods, and devices for near data processing

Inventors: Wenqin Huangfu (Goleta, CA); Krishna T. Malladi (San Jose, CA); Dongyan Jiang (San Jose, CA)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F12/1433G06F9/5016G06F13/1673G06F13/4234G06F2209/508
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Quick Facts
Patent No.
US 12,554,656
App. No.
17/214,778
Granted
Feb 17, 2026
Kind
B2
Abstract

A memory module may include one or more memory devices, and a near-memory computing module coupled to the one or more memory devices, the near-memory computing module including one or more processing elements configured to process data from the one or more memory devices, and a memory controller configured to coordinate access of the one or more memory devices from a host and the one or more processing elements. A method of processing a dataset may include distributing a first portion of the dataset to a first memory module, distributing a second portion of the dataset to a second memory module, constructing a first local data structure at the first memory module based on the first portion of the dataset, constructing a second local data structure at the second memory module based on the second portion of the dataset, and merging the first and second local data structures.

Claims (73)

1 . An apparatus comprising:

a memory module comprising:

a first rank of one or more first memory devices;

a near-memory computing circuit coupled to one of the one or more first memory devices, the near-memory computing circuit comprising:

a first processing element configured to process data from the one or more first memory devices; and

a first memory controller configured to coordinate access of the one or more first memory devices by a host and the first processing element;

a second rank of one or more second memory devices;

a bus structure configured to transfer data between the first rank and the second rank; and

wherein the memory module is configured to:

send a first portion of a dataset to the one or more first memory devices, wherein the one or more first memory devices are coupled to the first processing element and a first connector to transfer the first portion of the dataset;

send a second portion of the dataset to the one or more second memory devices, wherein the one or more second memory devices are coupled to a second processing element and a second connector to transfer the second portion of the dataset;

construct, using the first processing element, a first data structure at the one or more first memory devices based on the first portion of the dataset;

construct, using the second processing element, a second data structure at the one or more second memory devices based on the second portion of the dataset;

merge the first data structure and the second data structure to generate a merged data structure;

send at least a first portion of the merged data structure to the one or more first memory devices; and

send a second portion of the merged data structure to the one or more second memory devices.

2 . The apparatus of claim 1 , wherein the first processing element is configured to process data from the one or more first memory devices by performing a counting operation on the data.

3 . The apparatus of claim 1 , wherein:

the near-memory computing circuit comprises a first near-memory computing circuit; and

the second rank comprises:

one or more second memory devices; and

a second near-memory computing circuit coupled to the one or more second memory devices, the second near-memory computing circuit comprising:

the second processing element configured to process data from the one or more second memory devices; and

a second memory controller configured to coordinate access of the one or more second memory devices from a host and the second processing element.

4 . The apparatus of claim 1 , wherein the near-memory computing circuit further comprises a workload monitor configured to modify a first workload of a first one of the one or more processing elements based on a second workload of a second one of the one or more processing elements.

5 . The apparatus of claim 1 , wherein the signal comprises a control signal or an address signal.

6 . The apparatus of claim 1 , wherein the signal comprises a data signal.

7 . A method comprising:

sending a first portion of a dataset to a first memory module comprising a first processing element and a first connector to transfer the first portion of the dataset;

sending a second portion of the dataset to a second memory module comprising a second processing element and a second connector to transfer the second portion of the dataset;

constructing, using the first processing element, a first data structure at the first memory module based on the first portion of the dataset;

constructing, using the second processing element, a second data structure at the second memory module based on the second portion of the dataset;

merging the first data structure and the second data structure to generate a merged data structure;

sending at least a first portion of the merged data structure to the first memory module; and

sending a second portion of the merged data structure to the second memory module.

8 . The method of claim 7 , wherein:

the method further comprises performing a counting operation on the merged data structure at the first memory module and the second memory module.

9 . The method of claim 7 , wherein:

the merging the first data structure and the second data structure comprises reducing the first data structure and the second data structure.

10 . The method of claim 9 , further comprising sending the first portion of the dataset to two or more ranks at the first memory module.

11 . The method of claim 7 , further comprising modifying a first workload of the first processing element based on a second workload of the second processing element.

12 . The method of claim 7 , further comprising:

accessing first data of the first data structure;

performing, using the first data, a task;

determining a result of the task; and

accessing, based on the result of the task, second data of the first data structure.

13 . The method of claim 7 , further comprising:

performing a first task based on a first memory access of the first portion of the dataset; and

performing a second task based on a second memory access of the first portion of the dataset.

14 . The method of claim 7 , wherein the merged data structure is a first merged data structure and the portion of the merged data structure is a first portion of the merged data structure, the method further comprising:

sending a second portion of the first merged data structure to the second memory module;

constructing a third data structure at the first memory module based on the first merged data structure;

constructing a fourth data structure at the first memory module based on the first merged data structure;

merging the third data structure and the fourth data structure to form a second merged data structure; and

performing a counting operation on the second merged data structure at the first memory module and the second memory module.

15 . The method of claim 7 , wherein:

the dataset comprises a genetic sequence;

the first data structure comprises a Bloom filter; and

the Bloom filter comprises one or more k mers of the genetic sequence.

16 . The method of claim 7 , wherein the first memory module comprises a first memory device and a second memory device, the method further comprising sending the first portion of the dataset to the first memory device and the second memory device based on a location of device information in an address for the first portion of the dataset.

17 . The method of claim 7 , wherein:

the first data structure comprises a first counting filter; and

the second data structure comprises a second counting filter.

18 . A system comprising:

a first memory module configured to construct a first local data structure based on a first portion of a dataset, the first memory module comprising a first connector to transfer the first portion of the dataset;

a second memory module configured to construct a second local data structure based on a second portion of the dataset, the second memory module comprising a second connector to transfer the second portion of the dataset; and

a host coupled to the first memory module and the second memory module using one or more memory channels, wherein the host is configured to:

send the first portion of the dataset to the first memory module;

send the second portion of the dataset to the second memory module;

merge the first local data structure and the second local data structure to generate a merged data structure;

send a first portion of the merged data structure to the first memory module; and

send a second portion of the merged data structure to the second memory module.

19 . The system of claim 18 , wherein the first memory module is configured to perform a counting operation on the first portion of the merged data structure.

Continuity (2)
Provisional Application 63021675 · May 7, 2020
Related Publication 20210349837A1 · Nov 11, 2021
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