Pixel arrangement and method for operating a pixel arrangement
View Patent ↗In an embodiment a pixel arrangement includes a photodiode, a circuit node, a transfer transistor coupled to the photodiode and to the circuit node, an amplifier with an input coupled to the circuit node, a first capacitor and a second capacitor, a first transistor coupled to an output of the amplifier and to the first capacitor, a second transistor coupled to the first transistor and to the second capacitor, a supply terminal, a reset transistor coupled to the supply terminal, a coupling transistor coupled to the circuit node and to the reset transistor and a third capacitor with a first electrode coupled to a node between the reset transistor and the coupling transistor.
1 . A pixel arrangement comprising:
a first photodiode;
a circuit node;
a first transfer transistor coupled to the first photodiode and to the circuit node;
a first amplifier with an input coupled to the circuit node;
a first capacitor and a second capacitor;
a first transistor coupled to an output of the first amplifier and to the first capacitor;
a second transistor coupled to the first transistor and to the second capacitor;
a supply terminal;
a reset transistor coupled to the supply terminal;
a coupling transistor coupled to the circuit node and to the reset transistor;
a third capacitor with a first electrode coupled to a node between the reset transistor and the coupling transistor;
a second amplifier having an input coupled to the second capacitor;
a column line;
a first select transistor coupled to the column line and to an output of the second amplifier
a third amplifier having an input coupled to the first capacitor; and
a second select transistor coupled to the column line and to an output of the third amplifier.
2 . The pixel arrangement of claim 1 ,
wherein the first transfer transistor and the coupling transistor are set in a conducting state at a start of a first storage phase, and
wherein the first and second transistors or the first transistor are/is set in a conducting state before an end of the first storage phase.
3 . The pixel arrangement of claim 2 ,
wherein the first transfer transistor is set in a conducting state at a start of a second storage phase, and
wherein the first transistor or the second transistor is set in a conducting state before an end of the second storage phase.
4 . The pixel arrangement of claim 1 , further comprising a first reference voltage terminal which is coupled to a second electrode of the third capacitor.
5 . The pixel arrangement of claim 1 , further comprising:
a first reference potential terminal; and
a bias transistor coupled to the output of the first amplifier and to the first reference potential terminal.
6 . The pixel arrangement of claim 1 ,
wherein the first capacitor comprises:
a first electrode coupled to a node between the first transistor and the second transistor, and
a second electrode coupled to a second reference potential terminal, and
wherein the second capacitor comprises:
a first electrode coupled to the second transistor and
a second electrode coupled to the second reference potential terminal.
7 . The pixel arrangement of claim 1 , further comprising:
a second photodiode; and
a second transfer transistor coupled to the second photodiode and to the circuit node.
8 . An image sensor comprising:
an array of a pixel arrangement; and
a row driver,
wherein the pixel arrangement comprises:
a photodiode,
a circuit node,
a transfer transistor coupled to the photodiode and to the circuit node,
an amplifier with an input coupled to the circuit node,
a first capacitor and a second capacitor,
a first transistor coupled to an output of the amplifier and to the first capacitor,
a second transistor coupled to the first transistor and to the second capacitor,
a supply terminal,
a reset transistor coupled to the supply terminal,
a coupling transistor coupled to the circuit node and to the reset transistor, and
a third capacitor with a first electrode coupled to a node between the reset transistor
and the coupling transistor,
wherein the row driver is configured to:
provide a transfer signal to a control terminal of the transfer transistor,
provide a coupling signal to a control terminal of the coupling transistor,
provide a reset signal to a control terminal of the reset transistor,
provide a first control signal to a control terminal of the first transistor, and
provide a second control signal to a control terminal of the second transistor, and
wherein a first pulse of the transfer signal in a first storage phase has a first voltage value and a second pulse of the transfer signal in a second storage phase has a second voltage value, the first voltage value being different from the second voltage value.
9 . The image sensor of claim 8 , wherein the row driver is configured to:
set the transfer transistor in a conducting state by the transfer signal and to set the coupling transistor in a conducting state by the coupling signal at a start of a first storage phase, and
set the first transistor in the conducting state by the first control signal and to set the second transistor in the conducting state by the second control signal before an end of the first storage phase.
10 . The image sensor of claim 9 , wherein the row driver is configured to:
set the transfer transistor in a conducting state by the transfer signal at the start of a second storage phase, and
set the first transistor in the conducting state by the first control signal before the end of the second storage phase.
11 . A method for operating a pixel arrangement, the method comprising:
converting electromagnetic radiation into charge by a photodiode;
providing a first pulse of a transfer signal to a transfer transistor and a pulse of a coupling signal to a coupling transistor for transferring the charge from the photodiode to a capacitance of a circuit node and to a third capacitor at a start of a first storage phase;
providing a pulse of a first control signal to a first transistor and a pulse of a second control signal to a second transistor before an end of the first storage phase for charging a first and a second capacitor as a function of a capacitance voltage at the capacitance of the circuit node or providing the pulse of the first control signal to the first transistor before the end of the first storage phase for charging the first capacitor as the function of the capacitance voltage at the capacitance of the circuit node;
providing a second pulse of the transfer signal to the transfer transistor for transferring further charge from the photodiode to the capacitance of the circuit node at a start of a second storage phase; and
providing a pulse of the first control signal to the first transistor before the end of the second storage phase for charging the first capacitor as a function of the capacitance voltage at the capacitance of the circuit node or providing a pulse of the second control signal to the second transistor before the end of the second storage phase for charging the second capacitor as a function of the capacitance voltage at the capacitance of the circuit node.
12 . The method of claim 11 , wherein the first pulse of the transfer signal has a first voltage value, the second pulse of the transfer signal has a second voltage value, and the first voltage value is different from the second voltage value.
13 . The method of claim 11 , wherein, in a first readout phase, the second capacitor is readout via a column line and, in a second readout phase, the first capacitor is readout via the column line.
14 . The method of claim 13 , wherein, in a third readout phase, the capacitance of the circuit node is reset and a reset level is read out via the column line.
15 . The method of claim 11 , further comprising, in a reset phase, providing a pulse of a reset signal to a reset transistor, a pulse of the coupling signal to the coupling transistor and a pulse of the transfer signal to the transfer transistor for providing a supply voltage to the photodiode, the circuit node and the third capacitor.