Microelectronic assemblies including stiffeners around individual dies
Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. In some embodiments, a microelectronic assembly may include a substrate; a lid surrounding an individual die, wherein the lid includes a planar portion and two or more sides extending from the planar portion, and wherein the individual die is electrically coupled to the substrate by interconnects; and a material surrounding the interconnects and coupling the two or more sides of the lid to the substrate.
1 . A microelectronic assembly, comprising:
a substrate;
a lid surrounding an individual die, wherein the lid includes a planar portion and two or more sides extending from the planar portion, and wherein the individual die is electrically coupled to the substrate by interconnects; and
a material surrounding the interconnects and coupling the two or more sides of the lid to the substrate; wherein:
the substrate further includes a trench and the two or more sides of the lid are partially disposed in the trench, wherein a material of the trench includes a solder mask.
2 . The microelectronic assembly of claim 1 , wherein the lid includes at least three sides.
3 . The microelectronic assembly of claim 1 , wherein the lid includes at least four sides.
4 . The microelectronic assembly of claim 1 , wherein a material of the lid includes a metal, a metal alloy, a plastic, or a ceramic.
5 . The microelectronic assembly of claim 1 , wherein the material includes an underfill material.
6 . The microelectronic assembly of claim 1 , wherein the material is between the substrate and the lid.
7 . The microelectronic assembly of claim 1 , wherein the material is between the planar portion of the lid and the individual die.
8 . The microelectronic assembly of claim 1 , wherein the two or more sides include cutouts.
9 . The microelectronic assembly of claim 1 , wherein a bottom edge of the two or more sides includes a rail.
10 . A microelectronic assembly, comprising:
a package substrate;
a die having a first surface, an opposing second surface, a first side surface, and an opposing second side surface, wherein the first and second side surfaces extend between the first surface and the second surface, and wherein the first surface of the die is electrically coupled to the package substrate by interconnects;
a material surrounding the interconnects; and
a component having a surface, a first sidewall, and a second sidewall, wherein the first and second sidewalls extend from the surface of the component, wherein the surface of the component is coupled to the second surface of the die, wherein the first and second sidewalls of the component extend along the respective first and second side surfaces of the die towards the package substrate, and wherein:
the first and second sidewalls of the component are coupled to the package substrate by the material surrounding the interconnects; and
the substrate further includes a trench and the first and second sidewalls of the component are partially disposed in the trench, wherein a material of the trench includes a solder mask.
11 . The microelectronic assembly of claim 10 , wherein the die further includes a third side surface extending between the first and second surfaces of the die, wherein the component further includes a third sidewall extending from the surface of the component, and wherein the third sidewall of the component extends along the third side surface of the die towards the package substrate and is coupled to the package substrate by the material surrounding the interconnects.
12 . The microelectronic assembly of claim 10 , wherein the material includes an underfill material.
13 . The microelectronic assembly of claim 10 , wherein the material is a first material, and the microelectronic assembly further comprises:
a second material between the surface of the component and the die.
14 . The microelectronic assembly of claim 13 , wherein the second material includes a thermal interface material (TIM).
15 . A computing device, comprising:
a circuit board; and
an integrated circuit (IC) package electrically coupled to the circuit board, wherein the IC package comprises:
a package substrate comprising a trench, wherein a material of the trench includes a solder mask;
a stiffener surrounding a single die, wherein the stiffener includes a planar portion and two or more sides extending from the planar portion and partially disposed in the trench, and wherein the single die is electrically coupled to the package substrate by interconnects; and
an underfill material surrounding the interconnects and coupling the two or more sides of the stiffener to the package substrate.
16 . The computing device of claim 15 , wherein a thickness of the planar portion of the stiffener is between 200 microns and 400 microns.
17 . The computing device of claim 15 , wherein a width of each of the two or more sides is between 200 microns and 400 microns.
18 . The computing device of claim 15 , wherein a thickness of the material between the planar portion of the stiffener and the single die is between 25 microns and 50 microns.