IP Library Granted Patent US 12,614,830
Granted Patent B2
US 12,614,830 · App. 18/034,697 · Granted Apr 28, 2026

Waveguide comprised of stacked lower and upper plates, where the lower plate is mounted on a circuit board and has a via therein for accommodating a launcher in the via

Inventors: Hyunjoo Park (Cheonan-si, KR); Hyungil Baek (Cheonan-si, KR); Seho Lee (Cheonan-si, KR); Yunsik Seo (Cheonan-si, KR)
Assignee: AMOSENSE CO., LTD.
H01P5/107H01P3/12H01P3/121H05K1/0237
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,614,830
App. No.
18/034,697
Granted
Apr 28, 2026
Kind
B2
Abstract

Disclosed is a waveguide having a first vertical transfer path formed at a lower plate coupled to a signal processing substrate, and having a horizontal transfer path and a second vertical transfer that are formed at an upper plate coupled to a radar antenna, and thus minimizing tolerance during assembly. The disclosed waveguide is constructed by stacking the upper plate on the upper surface of the lower plate, a first vertical through-hole is formed in the lower plate, a second vertical through-hole and a horizontal groove are formed in the upper plate, and the horizontal groove connects the first vertical through-hole and the second vertical through-hole to form a radio wave transfer path.

Claims (11)

1 . A waveguide interposed between a circuit board and an antenna, comprising:

a lower plate stacked on an upper surface of the circuit board and having a first vertical through-hole formed therein; and

an upper plate stacked on an upper surface of the lower plate, having a second vertical through-hole formed at a position spaced apart from a region overlapping the first vertical through-hole, and having a horizontal groove connecting the first vertical through-hole and the second vertical through-hole;

wherein the circuit board includes a launcher mounted on the upper surface of the circuit board and configured to transmit or receive radio waves,

the first vertical through-hole is formed to vertically pass through a region of the lower plate that overlaps a first region of the upper surface of the circuit board where the launcher is located; and

when the lower plate is stacked on the upper surface of the circuit board, the launcher is accommodated within the first vertical through-hole to be spaced apart from an inner wall of the first vertical through-hole and is exposed upward through the first vertical through-hole,

wherein a height of the launcher is smaller than a depth of the first vertical through-hole so that an upper end of the launcher does not protrude beyond the upper surface of the lower plate.

2 . The waveguide of claim 1 , wherein the second vertical through-hole is formed to vertically pass through the upper plate in a second region of the upper plate that is spaced apart from the region of the upper plate overlapping the first vertical through-hole.

3 . The waveguide of claim 1 , wherein the horizontal groove is formed in a lower surface of the upper plate in surface contact with the upper surface of the lower plate.

4 . The waveguide of claim 3 , wherein, as the upper plate is stacked on the lower plate, inner wall surfaces of the horizontal groove and the upper surface of the lower plate form a horizontal through-hole.

5 . The waveguide of claim 4 , wherein a first end of the horizontal through-hole is connected to the first vertical through-hole, and a second end of the horizontal through-hole is connected to the second vertical through-hole to form a radio wave transfer path.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2023
From: PARK, HYUNJOO; BAEK, HYUNGIL; LEE, SEHO; SEO, YUNSIK
To: AMOSENSE CO., LTD.
Reel/Frame 063498/0635 →
Priority Claims (1)
KR 10-2020-0143703 · Oct 30, 2020 · national
Continuity (1)
Related Publication 20230402730A1 · Dec 14, 2023
References Cited (10)
US 5929728A · Barnett et al. · 1999 [cited by examiner]
US 6011453A · Glinder et al. · 2000 [cited by examiner]
US 7336221B2 · Matsuo et al. · 2008 [cited by applicant]
US 7680464B2 · Pleva et al. · 2010 [cited by examiner]
US 8054142B2 · Fujita · 2011 [cited by examiner]
US 20040227597A1 · Chang et al. · 2004 [cited by examiner]
US 20090224857A1 · Fujita · 2009 [cited by applicant]
JP 4634837B2 · 2011 [cited by applicant]
JP 5093137B2 · 2012 [cited by applicant]
JP 5198327B2 · 2013 [cited by applicant]