IP Library Granted Patent US 12,648,166
Granted Patent B2
US 12,648,166 · App. 17/565,991 · Granted Jun 2, 2026

Semiconductor device and method for manufacturing the same

Inventors: Yen-Hsing Chen (Taipei City, TW); Chun-Liang Kuo (Kaohsiung City, TW); Tsung-Mu Yang (Tainan City, TW); Yu-Ren Wang (Tainan City, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H10D30/475H10D30/015H10D62/824H10D62/8503
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Quick Facts
Patent No.
US 12,648,166
App. No.
17/565,991
Granted
Jun 2, 2026
Kind
B2
Abstract

A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a channel layer on the substrate, a first barrier layer on the channel layer, a second barrier layer on the first barrier layer, and a gate element on the second barrier layer. The first barrier layer includes a first material with a first band gap, the second barrier layer includes a second material with a second band gap, and the first band gap is greater than the second band gap.

Claims (23)

1 . A semiconductor device, comprising:

a substrate;

a channel layer on the substrate;

a first barrier layer on the channel layer;

a second barrier layer on the first barrier layer;

a gate element on the second barrier layer; and

a passive layer disposed conformally along a sidewall of the second barrier layer and an upper surface of the first barrier layer,

wherein the first barrier layer comprises a first material with a first band gap, the second barrier layer comprises a second material with a second band gap, and the first band gap is greater than the second band gap, the first barrier layer has a first aluminum content, the second barrier layer has a second aluminum content, and the first aluminum content is greater than the second aluminum content.

2 . The semiconductor device according to claim 1 , further comprising a control layer between the second barrier layer and the gate element, wherein the control layer comprises GaN doped with p-type dopants, and the channel layer comprises GaN.

3 . The semiconductor device according to claim 1 , wherein the first material includes AlN, GaN, InN, AlGaN, AlInN, GaInN or AlGaInN.

4 . The semiconductor device according to claim 1 , wherein the first material comprises Al a Ga 1−a N, the second material comprises Al b Ga 1−b N, and a is greater than b.

5 . The semiconductor device according to claim 4 , wherein a and b are constants.

6 . The semiconductor device according to claim 4 , wherein b linearly decreases from a bottom surface of the second barrier layer toward a direction away from the first barrier layer.

7 . The semiconductor device according to claim 4 , wherein b stepwise decreases from a bottom surface of the second barrier layer toward a direction away from the first barrier layer.

8 . The semiconductor device according to claim 4 , wherein a is greater than or equal to 0.20, and b is smaller than 0.20.

9 . The semiconductor device according to claim 4 , wherein a is greater than or equal to 0.18, and b is smaller than 0.18.

10 . The semiconductor device according to claim 1 , further comprising a dielectric layer on an upper surface of the passive layer, wherein the gate element directly contacts the dielectric layer and the passive layer.

11 . The semiconductor device according to claim 10 , further comprising a first source/drain element and a second source/drain element on opposite sides of the first barrier layer, wherein the first source/drain element and the second source/drain element directly contact the dielectric layer and the passive layer.

12 . The semiconductor device according to claim 10 , wherein the dielectric layer is on a sidewall of the gate element and a sidewall of the passive layer.

13 . The semiconductor device according to claim 1 , wherein the first barrier layer has a first thickness, the second barrier layer has a second thickness smaller than the first thickness.

14 . The semiconductor device according to claim 1 , further comprising a third barrier layer, wherein the second barrier layer is between the first barrier layer and the third barrier layer, the third barrier layer comprises a third material with a third band gap, and the third band gap is smaller than the first band gap.

15 . The semiconductor device according to claim 1 , wherein the second barrier layer partially covers the upper surface of the first barrier layer.

16 . The semiconductor device according to claim 1 , wherein the second material includes AlN, GaN, InN, AlGaN, AlInN, GaInN or AlGaInN.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2021
From: CHEN, YEN-HSING; KUO, CHUN-LIANG; YANG, TSUNG-MU; WANG, YU-REN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 058508/0522 →
Priority Claims (1)
TW 110143986 · Nov 25, 2021 · national
Continuity (1)
Related Publication 20230163205A1 · May 25, 2023
References Cited (3)
US 10014402B1 · Chen et al. · 2018 [cited by applicant]
US 20150123139A1 · Kim et al. · 2015 [cited by applicant]
US 20190013399A1 · Liu et al. · 2019 [cited by applicant]