Nanosheet replacement metal gate patterning scheme
A device includes a base layer structure including a first region and a second region; a first bottom gate material in a plurality of first-type doped regions in the first and second regions; a second bottom gate material in a second-type doped regions in the first and second regions; first nanosheet gate-all-round device structures on the first bottom gate material; and second nanosheet gate-all-round device structures on the second bottom gate material, wherein the first bottom gate material is located over the second nanosheet gate-all-around device structures in the second-type doped regions of the first and second regions, wherein the second bottom gate material extends, in boundary regions between the first-type and second-type doped regions, on the base layer structure from the second nanosheet gate-all-around devices structures toward the first gate-all-round device structures.
1 . A device comprising:
a base layer structure comprising a first region and a second region;
a first bottom gate material disposed directly on the base layer structure in a plurality of first-type doped regions in the first region and the second region;
a second bottom gate material disposed directly on the base layer structure in a plurality of second-type doped regions in the first region and the second region;
a first plurality of nanosheet gate-all-round device structures on the first bottom gate material; and
a second plurality of nanosheet gate-all-round device structures on the second bottom gate material,
wherein the first bottom gate material is located over the second plurality of nanosheet gate-all-around device structures in the plurality of second-type doped regions of the first region and the second region,
wherein the second bottom gate material extends, in boundary regions between the plurality of first-type doped regions and the plurality of second-type doped regions, on the base layer structure from the second plurality of nanosheet gate-all-around devices structures toward the first plurality of nanosheet gate-all-round device structures, wherein the second bottom gate material extends a first distance in the first region and a second distance in the second region, and wherein the first distance is less than the second distance.
2 . The device of claim 1 , wherein the base layer structure comprises:
a substrate;
an insulator on the substrate; and
a high-K dielectric layer on the insulator.
3 . The device of claim 1 , wherein the second bottom gate material extends, in the second region, to the first plurality of nanosheet gate-all-round device structures in an adjacent one of the plurality of first-type doped regions.
4 . The device of claim 1 , wherein the second bottom gate material extends a first distance in the first region and a second distance in the second region, wherein the first distance and the second distance are equal.
5 . The device of claim 4 , wherein the first distance and the second distance are at least half a distance between adjacent ones of the first plurality of nanosheet gate-all-round device structures and the second plurality of nanosheet gate-all-round device structures.
6 . The device of claim 1 , wherein the second bottom gate material extends a first distance in the first region and a second distance in the second region, wherein the device further comprises a residual island of the second bottom gate material in the boundary region.
7 . The device of claim 6 , wherein the residual island of the second bottom gate material in the boundary region is nearer to the first-type doped region of the first region.
8 . The device of claim 1 , wherein the boundary region in the first region is wider than the boundary region in the second region.
9 . The device of claim 1 , wherein the first plurality of nanosheet gate-all-round device structures and the second plurality of nanosheet gate-all-round device structures each comprise:
a plurality of channels disposed in a stack and separated by a work function material;
an interfacial layer encapsulating the plurality of channels; and
a high-K material encapsulating the interfacial layer.
10 . The device of claim 9 , wherein the work function material in the second plurality of nanosheet gate-all-round device structures comprises a different material than the work function material in the first plurality of nanosheet gate-all-round device structures.