IP Library Granted Patent US 12,652,995
Granted Patent B2
US 12,652,995 · App. 18/211,656 · Granted Jun 9, 2026

Method of manufacturing a semiconductor device

Inventors: Gregor Langer (Wölfnitz, AT); Bernhard Goller (Villach, AT); Nilesha Mishra (Villach, AT); Matteo Piccin (Villach, AT); Franz-Josef Pichler (Villach, AT)
Assignee: Infineon Technologies AG
H01L21/6835H01L21/3043H01L22/14H01L2221/68318H01L2221/68381
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Quick Facts
Patent No.
US 12,652,995
App. No.
18/211,656
Granted
Jun 9, 2026
Kind
B2
Abstract

A method of manufacturing a semiconductor device in a semiconductor body is proposed. The method includes processing a semiconductor body at a first surface of the semiconductor body. The method further includes attaching the semiconductor body to a carrier via the first surface. The carrier includes an inner part and an outer part at least partly surrounding the inner part. The method further includes processing the semiconductor body at a second surface opposite to the first surface. The method further includes detaching the inner part of the carrier from the semiconductor body.

Claims (62)

1 . A method of manufacturing a semiconductor device, the method comprising:

processing a semiconductor body at a first surface of the semiconductor body;

attaching the semiconductor body to a carrier via the first surface, the carrier comprising an inner part and an outer part at least partly surrounding the inner part;

processing the semiconductor body at a second surface opposite to the first surface; and

detaching the inner part of the carrier from the semiconductor body,

wherein detaching the inner part of the carrier from the semiconductor body comprises separating the inner part from the outer part of the carrier by removing material of the carrier,

wherein removing the material of the carrier comprises laser irradiating a separation region between the inner part and the outer part of the carrier,

wherein the carrier includes a groove on a surface of the carrier in the separation region, and

wherein the carrier is attached to the semiconductor body via the surface including the groove.

2 . The method of claim 1 , further comprising:

testing electric characteristics by bringing at least one probe into electric contact with the semiconductor body from a side of the semiconductor body where the outer part of the carrier is attached to the semiconductor body.

3 . The method of claim 1 , wherein processing the semiconductor body at the first surface comprises:

introducing dopants into the semiconductor body through the first surface; and/or

forming a wiring area including a plurality of contact pads over the first surface of the semiconductor body; and/or

forming trenches in the semiconductor body at the first surface.

4 . The method of claim 1 , wherein processing the semiconductor body at the second surface comprises:

reducing a thickness of the semiconductor body by removing material from the second surface of the semiconductor body.

5 . A method of manufacturing a semiconductor device, the method comprising:

processing a semiconductor body at a first surface of the semiconductor body;

attaching the semiconductor body to a carrier via the first surface, the carrier comprising an inner part and an outer part at least partly surrounding the inner part;

processing the semiconductor body at a second surface opposite to the first surface; and

detaching the inner part of the carrier from the semiconductor body,

wherein detaching the inner part of the carrier from the semiconductor body comprises separating the inner part from the outer part of the carrier by removing material of the carrier,

wherein the carrier includes a groove on a surface of the carrier in a separation region between the inner part and the outer part of the carrier,

wherein the carrier is attached to the semiconductor body via the surface including the groove, and

wherein removing the material of the carrier comprises abrasive machining from a surface opposite to the groove to expose the groove and separate the inner part from the outer part of the carrier.

6 . The method of claim 5 , further comprising:

testing electric characteristics by bringing at least one probe into electric contact with the semiconductor body from a side of the semiconductor body where the outer part of the carrier is attached to the semiconductor body.

7 . The method of claim 5 , wherein processing the semiconductor body at the first surface comprises:

introducing dopants into the semiconductor body through the first surface; and/or

forming a wiring area including a plurality of contact pads over the first surface of the semiconductor body; and/or

forming trenches in the semiconductor body at the first surface.

8 . The method of claim 5 , wherein processing the semiconductor body at the second surface comprises:

reducing a thickness of the semiconductor body by removing material from the second surface of the semiconductor body.

9 . A method of manufacturing a semiconductor device, the method comprising:

processing a semiconductor body at a first surface of the semiconductor body;

attaching the semiconductor body to a carrier via the first surface, the carrier comprising an inner part and an outer part at least partly surrounding the inner part;

processing the semiconductor body at a second surface opposite to the first surface; and

detaching the inner part of the carrier from the semiconductor body,

wherein detaching the inner part of the carrier from the semiconductor body comprises removing an adhesion layer between the inner part of the carrier and the semiconductor body, by introducing an etch solution into holes extending through the carrier.

10 . The method of claim 9 , further comprising:

testing electric characteristics by bringing at least one probe into electric contact with the semiconductor body from a side of the semiconductor body where the outer part of the carrier is attached to the semiconductor body.

11 . The method of claim 9 , wherein processing the semiconductor body at the first surface comprises:

introducing dopants into the semiconductor body through the first surface; and/or

forming a wiring area including a plurality of contact pads over the first surface of the semiconductor body; and/or

forming trenches in the semiconductor body at the first surface.

12 . The method of claim 9 , wherein processing the semiconductor body at the second surface comprises:

reducing a thickness of the semiconductor body by removing material from the second surface of the semiconductor body.

13 . A method of manufacturing a semiconductor device, the method comprising:

processing a semiconductor body at a first surface of the semiconductor body;

attaching the semiconductor body to a carrier via the first surface, the carrier comprising an inner part and an outer part at least partly surrounding the inner part;

processing the semiconductor body at a second surface opposite to the first surface; and

detaching the inner part of the carrier from the semiconductor body,

wherein detaching the inner part of the carrier from the semiconductor body comprises removing a water soluble layer between the inner part of the carrier and the semiconductor body, by dissolving the water soluble layer with water.

14 . The method of claim 13 , further comprising:

testing electric characteristics by bringing at least one probe into electric contact with the semiconductor body from a side of the semiconductor body where the outer part of the carrier is attached to the semiconductor body.

15 . The method of claim 13 , wherein processing the semiconductor body at the first surface comprises:

introducing dopants into the semiconductor body through the first surface; and/or

forming a wiring area including a plurality of contact pads over the first surface of the semiconductor body; and/or

forming trenches in the semiconductor body at the first surface.

16 . The method of claim 13 , wherein processing the semiconductor body at the second surface comprises:

reducing a thickness of the semiconductor body by removing material from the second surface of the semiconductor body.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2023
From: LANGER, GREGOR; GOLLER, BERNHARD; MISHRA, NILESHA; PICCIN, MATTEO; PICHLER, FRANZ-JOSEF
To: INFINEON TECHNOLOGIES AG
Reel/Frame 064491/0428 →
Priority Claims (1)
EP 22182281 · Jun 30, 2022 · regional
Continuity (1)
Related Publication 20240006218A1 · Jan 4, 2024
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