Transient voltage absorption element
A transient voltage absorption element is provided that includes a first path and a second path, the first path is a current path in which a surge current flows, and the second path is a current path in a frequency band of a signal that propagates through the signal line. The first path includes a series circuit including a diode including a depletion layer capacitance, a first inductor, and a first resistance component, and the second path includes a series circuit including a capacitance, a second inductor, and a second resistance component. A resistance value of the first resistance component is higher than a resistance value of the second resistance component.
1 . A transient voltage absorption element configured to be connected in shunt between a signal line and a reference potential, the transient voltage absorption element comprising:
a first path connected in shunt between the signal line and the reference potential, the first path being a current path in which a surge current flows and comprising a series circuit including a diode having a depletion layer capacitance, a first inductor component, and a first resistance component; and
a second path connected in shunt between the signal line and the reference potential, the second path being a current path in a frequency band of a signal that propagates through the signal line and comprising a series circuit including a capacitance, a second inductor component, and a second resistance component;
wherein the capacitance is generated between wirings that are electrically connected to the diode, and
wherein the first resistance component has a resistance value that is higher than a resistance value of the second resistance component.
2 . The transient voltage absorption element according to claim 1 , further comprising:
a semiconductor substrate; and
an epitaxial layer on a surface of the semiconductor substrate and including a p+ region and an n+ region in a direction along a plane of the semiconductor substrate.
3 . The transient voltage absorption element according to claim 2 , wherein the diode is configured by the epitaxial layer, the p+ region, and the n+ region.
4 . The transient voltage absorption element according to claim 3 , further comprising a layer having a same concentration as the epitaxial layer that is between an end portion of the p+ region and an end portion of the n+ region that faces the end portion of the p+ region at a distance between the p+ region and the n+ region in the direction along the plane of the semiconductor substrate.
5 . The transient voltage absorption element according to claim 3 , further comprising an insulation portion configured to cause a current to detour, the current flowing through the epitaxial layer between the p+ region and the n+ region.
6 . The transient voltage absorption element according to claim 3 , further comprising a high resistance portion configured to cause a current to detour, the current flowing through the epitaxial layer between the p+ region and the n+ region.
7 . The transient voltage absorption element according to claim 6 , wherein the high resistance portion is disposed from the epitaxial layer to the semiconductor substrate.
8 . The transient voltage absorption element according to claim 2 , further comprising a wiring layer in an upper portion of the p+ region and that is electrically connected to the p+ region.
9 . The transient voltage absorption element according to claim 8 , wherein:
the diode is configured by the epitaxial layer, the p+ region, and the n+ region, and
the wiring layer includes a non-covered region that does not cover a portion of the p+ region.
10 . The transient voltage absorption element according to claim 2 , further comprising a wiring layer in an upper portion of the n+ region and is electrically connected to the n+ region.
11 . The transient voltage absorption element according to claim 10 , wherein:
the diode is configured by the epitaxial layer, the p+ region, and the n+ region, and
the wiring layer includes a non-covered region that does not cover a portion of the n+ region.
12 . The transient voltage absorption element according to claim 2 , further comprising:
an insulating layer on a surface of the epitaxial layer; and
a trench contacting the insulating layer and provided over the epitaxial layer and a portion of the semiconductor substrate.
13 . A transient voltage absorption element comprising:
a first path connected in shunt between a signal line and a reference potential, the first path comprising a series circuit including a diode having a depletion layer capacitance, a first inductor component, and a first resistance component; and
a second path connected in shunt between the signal line and the reference potential, the second path comprising a series circuit including a capacitance, a second inductor component, and a second resistance component;
wherein the capacitance is generated between wirings that are electrically connected to the diode, and
wherein the first resistance component has a resistance value that is higher than a resistance value of the second resistance component.
14 . The transient voltage absorption element according to claim 13 , wherein the first path is a current path in which a surge current flows and the second path is a current path in a frequency band of a signal that propagates through the signal line.
15 . The transient voltage absorption element according to claim 13 , further comprising:
a semiconductor substrate; and
an epitaxial layer on a surface of the semiconductor substrate and including a p+ region and an n+ region in a direction along a plane of the semiconductor substrate.
16 . The transient voltage absorption element according to claim 15 , wherein the diode is configured by the epitaxial layer, the p+ region, and the n+ region.
17 . The transient voltage absorption element according to claim 16 , further comprising:
a layer having a same concentration as the epitaxial layer that is between an end portion of the p+ region and an end portion of the n+ region that faces the end portion of the p+ region at a distance between the p+ region and the n+ region in the direction along the plane of the semiconductor substrate; and
an insulation portion configured to cause a current to detour, the current flowing through the epitaxial layer between the p+ region and the n+ region.
18 . The transient voltage absorption element according to claim 15 , further comprising:
a wiring layer in an upper portion of the p+ region and that is electrically connected to the p+ region, wherein:
the diode is configured by the epitaxial layer, the p+ region, and the n+ region, and
the wiring layer includes a non-covered region that does not cover a portion of the p+ region.
19 . The transient voltage absorption element according to claim 15 , further comprising:
a wiring layer in an upper portion of the n+ region and is electrically connected to the n+ region, wherein:
the diode is configured by the epitaxial layer, the p+ region, and the n+ region, and
the wiring layer includes a non-covered region that does not cover a portion of the n+ region.
20 . The transient voltage absorption element according to claim 15 , further comprising:
an insulating layer on a surface of the epitaxial layer; and
a trench contacting the insulating layer and provided over the epitaxial layer and a portion of the semiconductor substrate.