IP Library Granted Patent US 12,713,721
Granted Patent B2
US 12,713,721 · App. 17/640,430 · Granted Aug 18, 2026

Imaging device

Inventors: Seiichi Yoneda (Isehara, JP); Yusuke Negoro (Kaizuka, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H10F39/803H04N25/59H04N25/771H10D86/423H10D86/481H10D86/60H10D87/00
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Quick Facts
Patent No.
US 12,713,721
App. No.
17/640,430
Filed
Mar 4, 2022
Granted
Aug 18, 2026
Kind
B2
Art Unit
2637
USPC
348/301
Abstract

An imaging device capable of taking an image in both a dark environment and a bright environment in a light amount range equivalent to or greater than that of human vision is desired. A wide dynamic range and high image quality are achieved. In order to obtain an image with a widened dynamic range, two capacitors, a large capacitor and a small capacitor, are provided in one pixel. The large capacitor is formed to be interposed between a transistor for controlling the amount of charge overflowed from the small capacitor and a transistor for resetting accumulated charge, and OS transistors are used as these two transistors. The OS transistor has extremely low off-state current characteristics, and thus can widen the dynamic range of imaging.

Claims (44)

1 . An imaging device comprising a first transistor to a sixth transistor, a photoelectric conversion element, a first capacitor, and a second capacitor,

wherein one electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the first transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to a source and a drain of the second transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to one electrode of the first capacitor,

wherein the other of the source and the drain of the first transistor is electrically connected to a gate electrode of the third transistor,

wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor,

wherein the other of the source and the drain of the second transistor is electrically connected to one electrode of the second capacitor,

wherein the one electrode of the second capacitor is electrically connected to one of a source and a drain of the fifth transistor,

wherein the other of the source and the drain of the fifth transistor is electrically connected to a wiring to which a constant potential is supplied,

wherein the fifth transistor is a reset transistor,

wherein one of a source and a drain of the sixth transistor is electrically connected to the one of the source and the drain of the first transistor,

wherein the first transistor, the third transistor, the fourth transistor, and the sixth transistor each comprise silicon in a region where a channel is formed, and

wherein the second transistor and the fifth transistor each comprise an oxide semiconductor in a region where a channel is formed.

2 . The imaging device according to claim 1 , wherein the second capacitor has larger capacitance than the first capacitor.

3 . The imaging device according to claim 1 , wherein the photoelectric conversion element and the first transistor are provided to be adjacent to each other, the photoelectric conversion element is provided to be adjacent to the sixth transistor, and the first transistor, the photoelectric conversion element, and the sixth transistor are manufactured on the same silicon substrate.

4 . An imaging device comprising a first transistor to a sixth transistor, a photoelectric conversion element, a first capacitor, and a second capacitor,

wherein one electrode of the photoelectric conversion element is directly connected to one of a source and a drain of the first transistor,

wherein the other of the source and the drain of the first transistor is directly connected to a source and a drain of the second transistor,

wherein the other of the source and the drain of the first transistor is directly connected to one electrode of the first capacitor,

wherein the other of the source and the drain of the first transistor is directly connected to a gate electrode of the third transistor,

wherein one of a source and a drain of the third transistor is directly connected to one of a source and a drain of the fourth transistor,

wherein the other of the source and the drain of the second transistor is directly connected to one electrode of the second capacitor,

wherein the one electrode of the second capacitor is directly connected to one of a source and a drain of the fifth transistor,

wherein the other of the source and the drain of the fifth transistor is electrically connected to a wiring to which a constant potential is supplied,

wherein the fifth transistor is a reset transistor,

wherein one of a source and a drain of the sixth transistor is directly connected to the one of the source and the drain of the first transistor,

wherein the first transistor, the third transistor, the fourth transistor, and the sixth transistor each comprise silicon in a region where a channel is formed, and

wherein the second transistor and the fifth transistor each comprise an oxide semiconductor in a region where a channel is formed.

5 . The imaging device according to claim 4 , wherein the second capacitor has larger capacitance than the first capacitor.

6 . The imaging device according to claim 4 , wherein the photoelectric conversion element and the first transistor are provided to be adjacent to each other, the photoelectric conversion element is provided to be adjacent to the sixth transistor, and the first transistor, the photoelectric conversion element, and the sixth transistor are manufactured on the same silicon substrate.

7 . An imaging device comprising a first transistor to a sixth transistor, a photoelectric conversion element, a first capacitor, and a second capacitor,

wherein one electrode of the photoelectric conversion element is directly connected to one of a source and a drain of the first transistor,

wherein the other of the source and the drain of the first transistor is directly connected to a source and a drain of the second transistor,

wherein the other of the source and the drain of the first transistor is directly connected to one electrode of the first capacitor,

wherein the other of the source and the drain of the first transistor is directly connected to a gate electrode of the third transistor,

wherein one of a source and a drain of the third transistor is directly connected to one of a source and a drain of the fourth transistor,

wherein the other of the source and the drain of the second transistor is directly connected to one electrode of the second capacitor,

wherein the one electrode of the second capacitor is directly connected to one of a source and a drain of the fifth transistor,

wherein the other of the source and the drain of the fifth transistor is electrically connected to a wiring to which a constant potential is supplied,

wherein the fifth transistor is a reset transistor,

wherein one of a source and a drain of the sixth transistor is directly connected to the one of the source and the drain of the first transistor, and

wherein the second transistor and the fifth transistor each comprise an oxide semiconductor in a region where a channel is formed.

8 . The imaging device according to claim 7 , wherein the second capacitor has larger capacitance than the first capacitor.

9 . The imaging device according to claim 7 , wherein the photoelectric conversion element and the first transistor are provided to be adjacent to each other, the photoelectric conversion element is provided to be adjacent to the sixth transistor, and the first transistor, the photoelectric conversion element, and the sixth transistor are manufactured on the same silicon substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2022
From: YONEDA, SEIICHI; NEGORO, YUSUKE
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 059890/0927 →
Priority Claims (2)
JP 2019-165028 · Sep 11, 2019 · national
JP 2019-187400 · Oct 11, 2019 · national
Continuity (1)
Related Publication 20220344392A1 · Oct 27, 2022
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