Seamless universal verification methodology
Universal Verification Methodology (UVM) for testing an integrated circuit includes receiving a configuration object having an address map code. A template code is enabled to be associated with the testing and it includes at least specifications associated with the UVM. A utility module is compiled to provide a model and a testbench environment within the UVM, where the model and the testbench environment are represented by a first class script and that is based in part on input from the template code and from the configuration object. A change is determined in the configuration object and a second class script is automatically generated using the utility module and based in part on the change in the configuration object, where the specifications remain unchanged for the second class script. The integrated circuit is tested using the second class script.
1 . A system, comprising:
at least one processor and memory comprising instructions that when executed by the at least one processor causes the system to:
receive a configuration object comprising an address map code, the configuration object to be used to test an integrated circuit using Universal Verification Methodology (UVM);
enable a template code to be associated with the testing and comprising at least specifications associated with the UVM;
compile a utility module to provide a model and a testbench environment within the UVM, the model and the testbench environment represented by a first class script and the utility module based in part on input from the template code and from the configuration object;
determine a change in the configuration object;
automatically generate a second class script using the utility module and based in part on the change in the configuration object, wherein the specifications remain unchanged for the second class script; and
test the integrated circuit using the second class script.
2 . The system of claim 1 , wherein the address map code comprises a register transfer language (RTL) code or comprises YAML Ain′t Markup Language® code.
3 . The system of claim 1 , wherein the specifications comprise SoC (System On Chip) or IP (Intellectual Property) block data for testing SoC or IP blocks associated with the integrated circuit.
4 . The system of claim 1 , wherein the first class script and the second class script each comprise testing requirements within the model and within the testbench environment for a control and status register (CSR) of the integrated circuit.
5 . The system of claim 1 , wherein the utility module comprises a macro-based utility to provide an expansion sequence within the template code.
6 . The system of claim 1 , wherein the address map comprises addresses and values for a plurality of registers within the integrated circuit and wherein the change in the configuration object allows the second class script to change a memory content and an address map content of the model relative to the first class script.
7 . A computer-implemented method comprising:
compiling a utility module to provide a model and a testbench environment within a Universal Verification Methodology (UVM) system, the model and the testbench environment represented by different classes of a first class script and the utility module based in part on input from a template code and input from a configuration object, the configuration object comprising an address map code and the testbench environment comprising agents to test an integrated circuit using the UVM system;
determining a change in the configuration object;
automatically generating a second class script using the utility module and based in part on the change in the configuration object, wherein specifications in the template code and associated with the UVM system remain unchanged for the second class script; and
providing the second class script for execution to test the integrated circuit.
8 . The computer-implemented method of claim 7 , wherein the configuration object comprises a register transfer language (RTL) code or comprises YAML Ain′t Markup Language® code.
9 . The computer-implemented method of claim 7 , wherein the specifications comprise SoC (System On Chip) or IP (Intellectual Property) block data for testing SoC or IP blocks associated with the integrated circuit.
10 . The computer-implemented method of claim 7 , wherein the first class script and the second class script comprise testing requirements for a control and status register (CSR) of the integrated circuit.
11 . The computer-implemented method of claim 7 , wherein the utility module comprises a macro-based utility to provide an expansion sequence within the template code.
12 . The computer-implemented method of claim 7 , wherein the address map comprises addresses and values for a plurality of registers within the integrated circuit and wherein the change in the configuration object allows the second class script to change a memory content and an address map content of the model relative to the first class script.
13 . The computer-implemented method of claim 7 , further comprising:
receiving the configuration object and the template code in an interface that is associated with or to be associated with the UVM system;
storing the template code in a storage associated with a client device;
receiving the change to the configuration object using the interface; and
providing the changes to the utility module based in part on the change to the configuration object and using the template code from the storage by repeating the compiling with the changes to the utility module.
14 . The computer-implemented method of claim 7 , wherein the changes provide a different address map or provide differences in the address map for the integrated circuit.
15 . The computer-implemented method of claim 7 , further comprising:
overwriting memory contents and address map contents of the UVM system based in part on the changes to the configuration object, wherein classes associated with the memory contents and the address map contents of the second class script provide new memory contents and a new address map to be used with the testbench environment.
16 . A non-transitory computer-storage medium storing instructions configured to instruct at least one processor to:
compile a utility module to provide a model and a testbench environment within a Universal Verification Methodology (UVM) system, the model and the testbench environment represented by different classes of a first class script and the utility module based in part on input from a template code and input from a configuration object, the configuration object comprising an address map code and the testbench environment comprising agents to test an integrated circuit using the UVM system;
determine a change in the configuration object;
automatically generate a second class script using the utility module and based in part on the change in the configuration object, wherein specifications in the template code and associated with the UVM system remain unchanged for the second class script; and
execute the second class script within the UVM environment to test the integrated circuit.
17 . The non-transitory computer-storage medium of claim 16 , wherein the instructions configured to further instruct the at least one processor to:
overwrite memory contents and address map contents of the UVM system based in part on the changes to the configuration object, wherein classes associated with the memory contents and the address map contents of the second class script provide new memory contents and a new address map to be used with the testbench environment.
18 . The non-transitory computer-storage medium of claim 16 , wherein the instructions configured to further instruct the at least one processor to:
receive the configuration object and the template code in an interface that is associated with or to be associated with the UVM system;
store the template code in a storage associated with a client device;
receive the change to the configuration object using the interface; and
provide the changes to the utility module based in part on the change to the configuration object and using the template code from the storage by repeating the compiling with the changes to the utility module.
19 . The non-transitory computer-storage medium of claim 16 , wherein the address map comprises addresses and values for a plurality of registers within the integrated circuit and wherein the change in the configuration object allows the second class script to change a memory content and an address map content of the model relative to the first class script.
20 . The non-transitory computer-storage medium of claim 16 , wherein the utility module comprises a macro-based utility to provide an expansion sequence within the template code.