IP Library › Granted Patent US 4,445,266
Granted Patent Utility
US 4,445,266 · App. 06/290,833

MOSFET Fabrication process for reducing overlap capacitance and lowering interconnect impedance

Inventors: Chao-Chuang Mai, William M. Whitney, William M. Gosney, Donald J. Gulyas
Patented Case View Patent ↗
Granted: May 1, 1984 Filed: Aug 7, 1981
Inventors
Chao-Chuang Mai
William M. Whitney
William M. Gosney
Donald J. Gulyas
Assignee (at issue)
Mostek Corporation

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Quick Facts
Patent No.
US 4,445,266
App. No.
06/290,833
Filed
1981-08-07
Granted
1984-05-01
Kind
A