IP Library › Granted Patent US 4,517,731
Granted Patent Utility
US 4,517,731 · App. 06/537,188

Double polysilicon process for fabricating CMOS integrated circuits

Inventors: Mahboob Khan, Tom Trieu
Patented Case View Patent ↗
Granted: May 21, 1985 Filed: Sep 29, 1983
Inventors
Mahboob Khan
Tom Trieu
Assignee (at issue)
Fairchild Camera & Instrument Corp.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 4,517,731
App. No.
06/537,188
Filed
1983-09-29
Granted
1985-05-21
Kind
A