Granted Patent
Utility
US 5,153,463 · App. 07/682,007
Programmable logic device having a reduced switching matrix
Inventor:
Kawana Keiichi
Patented Case
View Patent ↗
Granted: Oct 6, 1992
Filed: Apr 8, 1991
Inventor
Kawana Keiichi
Assignee (at issue)
Kawasaki Steel Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.