Granted Patent
Utility
US 5,185,292 · App. 07/802,882
Process for forming extremely thin edge-connectable integrated circuit structure
Inventors:
Nicolaas W. VanVonno, Dyer A. Matlock
Patented Case
View Patent ↗
Granted: Feb 9, 1993
Filed: Dec 6, 1991
Inventors
Nicolaas W. VanVonno
Dyer A. Matlock
Assignee (at issue)
HARRIS CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.