IP Library › Granted Patent US 5,327,131
Granted Patent Utility
US 5,327,131 · App. 07/971,509

Parallel A/D converter having comparator threshold voltages defined by MOS transistor geometries

Inventors: Masayuki Ueno, Hiroshi Ogasawara, Hideo Sako
Patented Case View Patent ↗
Granted: Jul 5, 1994 Filed: Nov 4, 1992
Inventors
Masayuki Ueno
Hiroshi Ogasawara
Hideo Sako
Assignee (at issue)
Kawasaki Steel Corporation

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Quick Facts
Patent No.
US 5,327,131
App. No.
07/971,509
Filed
1992-11-04
Granted
1994-07-05
Kind
A