Granted Patent
Utility
US 5,429,958 · App. 08/080,744
Process for forming twin well CMOS integrated circuits
Inventor:
Dyer A. Matlock
Patented Case
View Patent ↗
Granted: Jul 4, 1995
Filed: Jun 22, 1993
Inventor
Dyer A. Matlock
Assignee (at issue)
HARRIS CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.