Granted Patent
Utility
US 5,521,834 · App. 08/159,976
Method and apparatus for calculating dynamic power dissipation in CMOS integrated circuits
Inventors:
Harold S. Crafts, Richard Blinne
Patented Case
View Patent ↗
Granted: May 28, 1996
Filed: Nov 30, 1993
Inventors
Harold S. Crafts
Richard Blinne
Assignees (at issue)
AT&T Global Information Solutions Company
Hyundai Electronics America
Symbios Logic Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.