Granted Patent
Utility
US 5,637,534 · App. 08/172,717
Method of manufacturing semiconductor device having multilevel interconnection structure
Inventors:
Nobuyuki Takeyasu, Hiroshi Yamamoto, Yumiko Kawano, Eiichi Kondoh, Tomoharu Katagiri, Tomohiro Ohta
Patented Case
View Patent ↗
Granted: Jun 10, 1997
Filed: Dec 27, 1993
Inventors
Nobuyuki Takeyasu
Hiroshi Yamamoto
Yumiko Kawano
Eiichi Kondoh
Tomoharu Katagiri
Tomohiro Ohta
Assignee (at issue)
Kawasaki Steel Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.