Granted Patent
Utility
US 5,669,010 · App. 08/608,993
Cascaded two-stage computational SIMD engine having multi-port memory and multiple arithmetic units
Inventor:
Jerome F. Duluk, Jr.
Patented Case
View Patent ↗
Granted: Sep 16, 1997
Filed: Mar 6, 1996
Inventor
Jerome F. Duluk, Jr.
Assignee (at issue)
Silicon Engines LTD
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.