IP Library › Granted Patent US 5,684,421
Granted Patent Utility
US 5,684,421 · App. 08/542,518

Compensated delay locked loop timing vernier

Inventors: Douglas J. Chapman, Jeffrey D. Currin
Patented Case View Patent ↗
Granted: Nov 4, 1997 Filed: Oct 13, 1995
Inventors
Douglas J. Chapman
Jeffrey D. Currin
Assignee (at issue)
Credence Systems Corporation

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Quick Facts
Patent No.
US 5,684,421
App. No.
08/542,518
Filed
1995-10-13
Granted
1997-11-04
Kind
A