Granted Patent
Utility
US 5,726,998 · App. 08/364,224
Partial scan path test of a semiconductor logic circuit
Inventor:
Hideharu Ozaki
Patented Case
View Patent ↗
Granted: Mar 10, 1998
Filed: Dec 27, 1994
Inventor
Hideharu Ozaki
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.