Granted Patent
Utility
US 5,812,476 · App. 08/902,105
Refresh circuit for DRAM with three-transistor type memory cells
Inventor:
Yuuichi Segawa
Patented Case
View Patent ↗
Granted: Sep 22, 1998
Filed: Jul 29, 1997
Inventor
Yuuichi Segawa
Assignee (at issue)
Kawasaki Steel Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.