Granted Patent
Utility
US 5,883,844 · App. 08/862,969
Method of stress testing integrated circuit having memory and integrated circuit having stress tester for memory thereof
Inventor:
Jason Siucheong So
Patented Case
View Patent ↗
Granted: Mar 16, 1999
Filed: May 23, 1997
Inventor
Jason Siucheong So
Assignee (at issue)
STMICROELECTRONICS, INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.