Granted Patent
Utility
US 5,924,120 · App. 09/018,320
Method and apparatus for maximizing utilization of an internal processor bus in the context of external transactions running at speeds fractionally greater than internal transaction times
Inventors:
Rahul Razdan, David A. Webb, James B. Keller, Derrick R. Meyer
Patented Case
View Patent ↗
Granted: Jul 13, 1999
Filed: Feb 3, 1998
Inventors
Rahul Razdan
David A. Webb
James B. Keller
Derrick R. Meyer
Assignee (at issue)
Digital Equipment Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.